slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2024-07-19	target/loongarch/gdbstub: Add vector registers support	Song Gao
2024-07-19	Merge tag 'pull-target-arm-20240718' of https://git.linaro.org/people/pmaydel...	Richard Henderson
2024-07-18	hvf: arm: Do not advance PC when raising an exception	Akihiko Odaki
2024-07-18	target/arm: Use FPST_F16 for SME FMOPA (widening)	Richard Henderson
2024-07-18	target/arm: Use float_status copy in sme_fmopa_s	Daniyal Khan
2024-07-18	target/arm: LDAPR should honour SCTLR_ELx.nAA	Peter Maydell
2024-07-18	target/arm: Fix handling of LDAPR/STLR with negative offset	Peter Maydell
2024-07-18	Merge tag 'pull-riscv-to-apply-20240718-1' of https://github.com/alistair23/q...	Richard Henderson
2024-07-18	target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR	Yu-Ming Chang
2024-07-18	target/riscv: Expose the Smcntrpmf config	Atish Patra
2024-07-18	target/riscv: Do not setup pmu timer if OF is disabled	Atish Patra
2024-07-18	target/riscv: More accurately model priv mode filtering.	Rajnesh Kanwal
2024-07-18	target/riscv: Start counters from both mhpmcounter and mcountinhibit	Rajnesh Kanwal
2024-07-18	target/riscv: Enforce WARL behavior for scounteren/hcounteren	Atish Patra
2024-07-18	target/riscv: Save counter values during countinhibit update	Atish Patra
2024-07-18	target/riscv: Implement privilege mode filtering for cycle/instret	Atish Patra
2024-07-18	target/riscv: Only set INH fields if priv mode is available	Atish Patra
2024-07-18	target/riscv: Add cycle & instret privilege mode filtering support	Kaiwen Xue
2024-07-18	target/riscv: Add cycle & instret privilege mode filtering definitions	Kaiwen Xue
2024-07-18	target/riscv: Add cycle & instret privilege mode filtering properties	Kaiwen Xue
2024-07-18	target/riscv: Fix the predicate functions for mhpmeventhX CSRs	Atish Patra
2024-07-18	target/riscv: Combine set_mode and set_virt functions.	Rajnesh Kanwal
2024-07-18	target/riscv/kvm: update KVM regs to Linux 6.10-rc5	Daniel Henrique Barboza
2024-07-18	target/riscv: Validate the mode in write_vstvec	Jiayi Li
2024-07-18	target/riscv: Expose zabha extension as a cpu property	LIU Zhiwei
2024-07-18	target/riscv: Add amocas.[b\|h] for Zabha	LIU Zhiwei
2024-07-18	target/riscv: Move gen_cmpxchg before adding amocas.[b\|h]	LIU Zhiwei
2024-07-18	target/riscv: Add AMO instructions for Zabha	LIU Zhiwei
2024-07-18	target/riscv: Move gen_amo before implement Zabha	LIU Zhiwei
2024-07-18	target/riscv: Support Zama16b extension	LIU Zhiwei
2024-07-18	target/riscv: Add zcmop extension	LIU Zhiwei
2024-07-18	target/riscv: Add zimop extension	LIU Zhiwei
2024-07-18	Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging	Richard Henderson
2024-07-17	target/hexagon/imported/mmvec: Fix superfluous trailing semicolon	Zhao Liu
2024-07-17	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Richard Henderson
2024-07-16	accel/tcg: Make cpu_exec_interrupt hook mandatory	Peter Maydell
2024-07-16	target/i386/tcg: save current task state before loading new one	Paolo Bonzini
2024-07-16	target/i386/tcg: use X86Access for TSS access	Paolo Bonzini
2024-07-16	target/i386/tcg: check for correct busy state before switching to a new task	Paolo Bonzini
2024-07-16	target/i386/tcg: Compute MMU index once	Paolo Bonzini
2024-07-16	target/i386/tcg: Introduce x86_mmu_index_{kernel_,}pl	Richard Henderson
2024-07-16	target/i386/tcg: Reorg push/pop within seg_helper.c	Richard Henderson
2024-07-16	target/i386/tcg: use PUSHL/PUSHW for error code	Paolo Bonzini
2024-07-16	target/i386/tcg: Allow IRET from user mode to user mode with SMAP	Paolo Bonzini
2024-07-16	target/i386/tcg: Remove SEG_ADDL	Richard Henderson
2024-07-16	target/i386/tcg: fix POP to memory in long mode	Paolo Bonzini
2024-07-16	i386/sev: Don't allow automatic fallback to legacy KVM_SEV*_INIT	Michael Roth
2024-07-12	target/loongarch: Fix cpu_reset set wrong CSR_CRMD	Song Gao
2024-07-12	target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values	Song Gao
2024-07-12	target/loongarch: Remove avail_64 in trans_srai_w() and simplify it	Feiyang Chen