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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2021-04-20
target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)
Philippe Mathieu-Daudé
2021-04-17
target/arm: drop CF_LAST_IO/dc->condjump check
Alex Bennée
2021-04-13
target/mips: Fix TCG temporary leak in gen_cache_operation()
Philippe Mathieu-Daudé
2021-04-12
target/arm: Check PAGE_WRITE_ORG for MTE writeability
Richard Henderson
2021-04-09
i386: Add missing cpu feature bits in EPYC-Rome model
Babu Moger
2021-04-06
Revert "target/arm: Make number of counters in PMCR follow the CPU"
Peter Maydell
2021-04-05
target/alpha: fix icount handling for timer instructions
Pavel Dovgalyuk
2021-04-04
Merge remote-tracking branch 'remotes/xtensa/tags/20210403-xtensa' into staging
Peter Maydell
2021-04-03
target/xtensa: make xtensa_modules static on import
Max Filippov
2021-04-03
target/xtensa: fix meson.build rule for xtensa cores
Max Filippov
2021-04-01
hexagon: do not specify Python scripts as inputs
Paolo Bonzini
2021-04-01
hexagon: do not specify executables as inputs
Paolo Bonzini
2021-04-01
target/openrisc: fix icount handling for timer instructions
Pavel Dovgalyuk
2021-04-01
target/i386: Verify memory operand for lcall and ljmp
Richard Henderson
2021-03-31
target/ppc/kvm: Cache timebase frequency
Greg Kurz
2021-03-30
target/arm: Make number of counters in PMCR follow the CPU
Peter Maydell
2021-03-26
s390x: move S390_ADAPTER_SUPPRESSIBLE
Gerd Hoffmann
2021-03-23
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210323'...
Peter Maydell
2021-03-23
target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
Richard Henderson
2021-03-23
target/arm: Make M-profile VTOR loads on reset handle memory aliasing
Peter Maydell
2021-03-22
target/riscv: Prevent lost illegal instruction exceptions
Georg Kotheimer
2021-03-22
target/riscv: Add proper two-stage lookup exception detection
Georg Kotheimer
2021-03-22
target/riscv: Fix read and write accesses to vsip and vsie
Georg Kotheimer
2021-03-22
target/riscv: Use background registers also for MSTATUS_MPV
Georg Kotheimer
2021-03-22
target/riscv: Make VSTIP and VSEIP read-only in hip
Georg Kotheimer
2021-03-22
target/riscv: Adjust privilege level for HLV(X)/HSV instructions
Georg Kotheimer
2021-03-22
target/riscv: flush TLB pages if PMP permission has been changed
Jim Shu
2021-03-22
target/riscv: add log of PMP permission checking
Jim Shu
2021-03-22
target/riscv: propagate PMP permission to TLB page
Jim Shu
2021-03-22
target/riscv: fix vs() to return proper error code
Frank Chang
2021-03-22
target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX
Peter Maydell
2021-03-19
i386: Make migration fail when Hyper-V reenlightenment was enabled but 'user_...
Vitaly Kuznetsov
2021-03-19
i386: Fix 'hypercall_hypercall' typo
Vitaly Kuznetsov
2021-03-19
target/i386: svm: do not discard high 32 bits of EXITINFO1
Paolo Bonzini
2021-03-19
target/i386: fail if toggling LA57 in 64-bit mode
Paolo Bonzini
2021-03-19
target/i386: allow modifying TCG phys-addr-bits
Paolo Bonzini
2021-03-17
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210316' into...
Peter Maydell
2021-03-15
Merge remote-tracking branch 'remotes/philmd/tags/avr-20210315' into staging
Peter Maydell
2021-03-15
Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20210314...
Peter Maydell
2021-03-15
target/s390x: Store r1/r2 for page-translation exceptions during MVPG
David Hildenbrand
2021-03-15
target/s390x: Implement the MVPG condition-code-option bit
Richard Henderson
2021-03-15
s390x/cpu_model: use official name for 8562
Cornelia Huck
2021-03-15
s390x/kvm: Get rid of legacy_s390_alloc()
David Hildenbrand
2021-03-15
target/avr: Fix interrupt execution
Ivanov Arkasha
2021-03-15
target/avr: Fix some comment spelling errors
Lichang Zhao
2021-03-14
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210313' into staging
Peter Maydell
2021-03-14
target/tricore: Fix OPC2_32_RRPW_EXTR for width=0
Bastian Koppelmann
2021-03-14
target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2
Bastian Koppelmann
2021-03-14
tricore: fixed faulty conditions for extr and imask
Andreas Konopik
2021-03-14
target/tricore: Remove unused definitions
Philippe Mathieu-Daudé
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