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path: root/target/ppc/translate.c
AgeCommit message (Expand)Author
2017-10-24tcg: Remove TCGV_EQUAL*Richard Henderson
2017-10-17target/ppc: Fix carry flag setting for shift algebraic instructionsSandipan Das
2017-08-31ppc: use DIV_ROUND_UPMarc-André Lureau
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-19target/ppc: optimize various functions using extract opPhilippe Mathieu-Daudé
2017-05-11target/ppc: Change tlbie invalid fields for POWER9 supportSuraj Jitindar Singh
2017-05-11target/ppc: Update tlbie to check privilege level based on GTSESuraj Jitindar Singh
2017-05-11target/ppc: Generate fence operationsNikunj A Dadhania
2017-05-11target/ppc: Emulate LL/SC using cmpxchg helpersNikunj A Dadhania
2017-03-14target/ppc: fix cpu_ov setting for 32-bitNikunj A Dadhania
2017-03-03spapr: Small cleanup of PPC MMU enumsSam Bobroff
2017-03-03target/ppc: Don't gen an SDR1 on POWER9 and rework register creationSuraj Jitindar Singh
2017-03-01target/ppc: add mcrxrx instructionNikunj A Dadhania
2017-03-01target/ppc: add ov32 flag in divide operationsNikunj A Dadhania
2017-03-01target/ppc: add ov32 flag for multiply low insnsNikunj A Dadhania
2017-03-01target/ppc: use tcg ops for neg instructionNikunj A Dadhania
2017-03-01target/ppc: update overflow flags for add/subNikunj A Dadhania
2017-03-01target/ppc: update ca32 in arithmetic substractNikunj A Dadhania
2017-03-01target/ppc: update ca32 in arithmetic addNikunj A Dadhania
2017-03-01target/ppc: support for 32-bit carry and overflowNikunj A Dadhania
2017-03-01target/ppc: optimize gen_write_xer()Nikunj A Dadhania
2017-02-22target-ppc: add wait instructionNikunj A Dadhania
2017-02-22target-ppc: add slbsync implementationNikunj A Dadhania
2017-02-22target-ppc: add slbieg instructionNikunj A Dadhania
2017-02-22target-ppc: generate exception for copy/pasteNikunj A Dadhania
2017-02-22target-ppc: implement store atomic instructionBalamuruhan S
2017-02-22target-ppc: implement load atomic instructionBalamuruhan S
2017-02-02tcg/POWER9: NOOP the cp_abort instructionSuraj Jitindar Singh
2017-02-02target/ppc/debug: Print LPCR register value if register existsSuraj Jitindar Singh
2017-01-31target-ppc: implement stop instructionNikunj A Dadhania
2017-01-31target-ppc: implement lxv/lxvx and stxv/stxvxNikunj A Dadhania
2017-01-31target-ppc: implement stxsd and stxsspNikunj A Dadhania
2017-01-31target-ppc: implement lxsd and lxssp instructionsNikunj A Dadhania
2017-01-31target-ppc: rename CRF_* defines as CRF_*_BITNikunj A Dadhania
2017-01-31target-ppc: Consolidate instruction decode helpersBharata B Rao
2017-01-10target-ppc: Use ctpop helperRichard Henderson
2017-01-10target-ppc: Use clz and ctz opcodesRichard Henderson
2017-01-10target-ppc: Use the new deposit and extract opsRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
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