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path: root/target/openrisc/insns.decode
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2019-09-04target/openrisc: Implement l.adrpRichard Henderson
This was added to the 1.3 spec. Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-09-04target/openrisc: Implement unordered fp comparisonsRichard Henderson
These were added to the 1.3 spec. For OF32S, validate AVR. But OF64A32 is itself new to 1.3 so no extra check needed. Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-09-04target/openrisc: Add support for ORFPX64A32Richard Henderson
This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix latent bugs in the heretofore unused helper_itofd and helper_ftoid. Include the bit for cpu "any". Change the default cpu for linux-user to "any". Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-08target/openrisc: Fix LGPL information in the file headersThomas Huth
It's either "GNU *Library* General Public License version 2" or "GNU Lesser General Public License version *2.1*", but there was no "version 2.0" of the "Lesser" license. So assume that version 2.1 is meant here. Acked-by: Stafford Horne <shorne@gmail.com> Message-Id: <1550073577-4248-1-git-send-email-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-05-14target/openrisc: Convert dec_floatRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert dec_compiRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert dec_compRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert dec_MRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert dec_logicRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert dec_macRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert dec_calcRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert remainder of dec_misc insnsRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert memory insnsRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Convert branch insnsRichard Henderson
Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-05-14target/openrisc: Start conversion to decodetree.pyRichard Henderson
Begin with the 0x08 major opcode, the system instructions. Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>