slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2023-07-25	target/mips: Avoid shift by negative number in page_table_walk_refill()	Peter Maydell
2023-07-25	target/mips: Pass directory/leaf shift values to walk_directory()	Philippe Mathieu-Daudé
2023-07-25	target/mips/mxu: Avoid overrun in gen_mxu_q8adde()	Philippe Mathieu-Daudé
2023-07-25	target/mips/mxu: Avoid overrun in gen_mxu_S32SLT()	Philippe Mathieu-Daudé
2023-07-25	target/mips/mxu: Replace magic array size by its definition	Philippe Mathieu-Daudé
2023-07-10	target/mips/mxu: Add Q8SAD instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32SFL instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q8MADL instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q16SCOP instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q8MAC Q8MACSU instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32/D16/Q8- MOVZ/MOVN instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D32/Q16- SLLV/SLRV/SARV instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q16SLL Q16SLR Q16SAR instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D32SLL D32SLR D32SAR instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D32SARL D32SARW instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32ALN S32LUI insns	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32MUL S32MULU S32EXTR S32EXTRV insns	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S8STD S8LDI S8SDI instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q16ACC Q16ACCM D16ASUM instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D32ADDC instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D32ACC D32ACCM D32ASUM instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D32ADD instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q16ADD instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S16MAD instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D16MADL instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D16MACF D16MACE instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add D16MULF D16MULE instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32CPS D16CPS Q8ABD Q16SAT insns	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q8ADD instruction	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns	Siarhei Volkau
2023-07-10	target/mips/mxu: Fix D16MAX D16MIN Q8MAX Q8MIN instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add Q8SLT Q8SLTU instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add S32MADD/MADDU/MSUB/MSUBU instructions	Siarhei Volkau
2023-07-10	target/mips/mxu: Add LXW LXB LXH LXBU LXHU instructions	Siarhei Volkau
2023-07-10	target/mips: Add emulation of MXU instructions for 32-bit load/store	Siarhei Volkau
2023-07-10	target/mips: Implement Loongson CSR instructions	Jiaxun Yang
2023-06-20	meson: Replace softmmu_ss -> system_ss	Philippe Mathieu-Daudé
2023-06-05	target/*: Add missing includes of exec/translation-block.h	Richard Henderson
2023-06-05	target/mips: Tidy helpers for translation	Richard Henderson
2023-06-05	accel/tcg: Introduce translator_io_start	Richard Henderson
2023-06-05	tcg: Pass TCGHelperInfo to tcg_gen_callN	Richard Henderson
2023-06-05	tcg: Move TCGv, dup_const_tl definitions to tcg-op.h	Richard Henderson
2023-05-11	target/mips: Use MO_ALIGN instead of 0	Richard Henderson
2023-05-11	target/mips: Add missing default_tcg_memop_mask	Richard Henderson
2023-05-11	target/mips: Add MO_ALIGN to gen_llwp, gen_scwp	Richard Henderson
2023-05-05	target/mips: Finish conversion to tcg_gen_qemu_{ld,st}_*	Richard Henderson
2023-04-20	target/mips: tcg: detect out-of-bounds accesses to cpu_gpr and cpu_gpr_hi	Paolo Bonzini
2023-03-13	target/mips: Avoid tcg_const_* throughout	Richard Henderson