Age | Commit message (Expand) | Author |
2020-09-01 | target/microblaze: Use cc->do_unaligned_access | Richard Henderson |
2020-09-01 | target/microblaze: Fix no-op mb_cpu_transaction_failed | Richard Henderson |
2020-09-01 | target/microblaze: Fix cpu unwind for stackprot | Richard Henderson |
2020-09-01 | target/microblaze: Fix cpu unwind for fpu exceptions | Richard Henderson |
2020-09-01 | target/microblaze: Unwind properly when raising divide-by-zero | Richard Henderson |
2020-09-01 | target/microblaze: Implement cmp and cmpu inline | Richard Henderson |
2020-09-01 | target/microblaze: Convert dec_sub to decodetree | Richard Henderson |
2020-09-01 | target/microblaze: Remove empty D macros | Richard Henderson |
2020-09-01 | target/microblaze: Remove helper_debug and env->debug | Richard Henderson |
2020-09-01 | target/microblaze: Fix width of ESR | Richard Henderson |
2020-09-01 | target/microblaze: Fix width of MSR | Richard Henderson |
2020-09-01 | target/microblaze: Fix width of PC and BTARGET | Richard Henderson |
2020-09-01 | target/microblaze: Split out FSR from env->sregs | Richard Henderson |
2020-09-01 | target/microblaze: Split out ESR from env->sregs | Richard Henderson |
2020-09-01 | target/microblaze: Split out EAR from env->sregs | Richard Henderson |
2020-09-01 | target/microblaze: Split out MSR from env->sregs | Richard Henderson |
2020-09-01 | target/microblaze: Split out PC from env->sregs | Richard Henderson |
2020-04-30 | target/microblaze: Add the div-zero-exception property | Edgar E. Iglesias |
2019-06-10 | target/microblaze: Use env_cpu, env_archcpu | Richard Henderson |
2019-05-10 | target/microblaze: Convert to CPUClass::tlb_fill | Richard Henderson |
2019-01-22 | target/microblaze: Switch to transaction_failed hook | Peter Maydell |
2018-05-29 | target-microblaze: Convert env_btarget to i64 | Edgar E. Iglesias |
2018-05-29 | target-microblaze: Add support for extended access to TLBLO | Edgar E. Iglesias |
2018-05-29 | target-microblaze: Make special registers 64-bit | Edgar E. Iglesias |
2018-05-29 | target-microblaze: Use TCGv for load/store addresses | Edgar E. Iglesias |
2018-02-21 | target/*/cpu.h: remove softfloat.h | Alex Bennée |
2018-01-25 | accel/tcg: add size paremeter in tlb_fill() | Laurent Vivier |
2017-12-27 | target/*helper: don't check retaddr before calling cpu_restore_state | Alex Bennée |
2017-01-10 | target-microblaze: Use clz opcode | Richard Henderson |
2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |