Age | Commit message (Expand) | Author |
---|---|---|
2016-12-27 | target-m68k: free TCG variables that are not | Laurent Vivier |
2016-12-27 | target-m68k: add rol/ror/roxl/roxr instructions | Laurent Vivier |
2016-12-27 | target-m68k: Inline shifts | Richard Henderson |
2016-12-27 | target-m68k: Do not cpu_abort on undefined insns | Richard Henderson |
2016-12-27 | target-m68k: Implement 680x0 movem | Laurent Vivier |
2016-12-27 | target-m68k: add cas/cas2 ops | Laurent Vivier |
2016-12-27 | target-m68k: add abcd/sbcd/nbcd | Laurent Vivier |
2016-12-27 | target-m68k: add 680x0 divu/divs variants | Laurent Vivier |
2016-12-27 | target-m68k: add 64bit mull | Laurent Vivier |
2016-12-27 | target-m68k: add cmpm | Laurent Vivier |
2016-12-27 | target-m68k: Split gen_lea and gen_ea | Richard Henderson |
2016-12-27 | target-m68k: Delay autoinc writeback | Richard Henderson |
2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |