Age | Commit message (Expand) | Author |
2018-03-23 | target/arm: Factor out code to calculate FSR for debug exceptions | Peter Maydell |
2018-03-23 | target/arm: Honour MDCR_EL2.TDE when routing exceptions due to BKPT/BRK | Peter Maydell |
2018-03-23 | arm/translate-a64: treat DISAS_UPDATE as variant of DISAS_EXIT | Victor Kamensky |
2018-03-19 | cpu: get rid of unused cpu_init() defines | Igor Mammedov |
2018-03-19 | cpu: add CPU_RESOLVING_TYPE macro | Igor Mammedov |
2018-03-09 | target/arm: Make 'any' CPU just an alias for 'max' | Peter Maydell |
2018-03-09 | target/arm: Add "-cpu max" support | Peter Maydell |
2018-03-09 | target/arm: Move definition of 'host' cpu type into cpu.c | Peter Maydell |
2018-03-09 | target/arm: Query host CPU features on-demand at instance init | Peter Maydell |
2018-03-09 | linux-user: Implement aarch64 PR_SVE_SET/GET_VL | Richard Henderson |
2018-03-09 | target/arm: Add a core count property | Alistair Francis |
2018-03-02 | qapi: Empty out qapi-schema.json | Markus Armbruster |
2018-03-02 | target/arm: Enable ARM_FEATURE_V8_FCMA | Richard Henderson |
2018-03-02 | target/arm: Decode t32 simd 3reg and 2reg_scalar extension | Richard Henderson |
2018-03-02 | target/arm: Decode aa32 armv8.3 2-reg-index | Richard Henderson |
2018-03-02 | target/arm: Decode aa32 armv8.3 3-same | Richard Henderson |
2018-03-02 | target/arm: Decode aa64 armv8.3 fcmla | Richard Henderson |
2018-03-02 | target/arm: Decode aa64 armv8.3 fcadd | Richard Henderson |
2018-03-02 | target/arm: Add ARM_FEATURE_V8_FCMA | Richard Henderson |
2018-03-02 | target/arm: Enable ARM_FEATURE_V8_RDM | Richard Henderson |
2018-03-02 | target/arm: Decode aa32 armv8.1 two reg and a scalar | Richard Henderson |
2018-03-02 | target/arm: Decode aa32 armv8.1 three same | Richard Henderson |
2018-03-02 | target/arm: Decode aa64 armv8.1 scalar/vector x indexed element | Richard Henderson |
2018-03-02 | target/arm: Decode aa64 armv8.1 three same extra | Richard Henderson |
2018-03-02 | target/arm: Decode aa64 armv8.1 scalar three same extra | Richard Henderson |
2018-03-02 | target/arm: Refactor disas_simd_indexed size checks | Richard Henderson |
2018-03-02 | target/arm: Refactor disas_simd_indexed decode | Richard Henderson |
2018-03-02 | target/arm: Add ARM_FEATURE_V8_RDM | Richard Henderson |
2018-03-02 | target/arm: Add Cortex-M33 | Peter Maydell |
2018-03-02 | target/arm: Define init-svtor property for the reset secure VTOR value | Peter Maydell |
2018-03-02 | target/arm: Define an IDAU interface | Peter Maydell |
2018-03-01 | target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPU | Peter Maydell |
2018-03-01 | arm/translate-a64: add all single op FP16 to handle_fp_1src_half | Alex Bennée |
2018-03-01 | arm/translate-a64: implement simd_scalar_three_reg_same_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add all FP16 ops in simd_scalar_pairwise | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FMOV to simd_mod_imm | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/helper.c: re-factor rsqrte and add rsqrte_f16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FRECPE | Alex Bennée |
2018-03-01 | arm/helper.c: re-factor recpe and add recepe_f16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: initial decode for simd_two_reg_misc_fp16 | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 x2 ops for simd_indexed | Alex Bennée |
2018-03-01 | arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed | Alex Bennée |