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AgeCommit message (Expand)Author
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
2008-12-23Add SuperSPARC MMU breakpoint registers (Robert Reif)blueswir1
2008-12-23Better SuperSPARC emulation (Robert Reif)blueswir1
2008-12-23Implement tick interrupt disable bitsblueswir1
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc
2008-12-13Remove unnecessary trailing newlinesblueswir1
2008-12-11Add missing "static"blueswir1
2008-11-30Common cpu_loop_exit prototypeaurel32
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori
2008-11-17TCG variable type checking.pbrook
2008-11-09Use TCG not opblueswir1
2008-11-09Use andc, orc, nor and nandblueswir1
2008-11-01Fix TCGv size mismatchesblueswir1
2008-10-07Add static (spotted by sparse)blueswir1
2008-10-07Fix error in fexpand (spotted by sparse)blueswir1
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir1
2008-10-03Rearrange tick functionsblueswir1
2008-10-03Fix missing prototype warnings by moving declarationsblueswir1
2008-10-02Fix MXCC printf warning (based on patch by Robert Reif)blueswir1
2008-09-27Add mmu tlb demap support (Igor Kovalenko)blueswir1
2008-09-26Add a generic Niagara machineblueswir1
2008-09-26Implement some UA2007 block ASIsblueswir1
2008-09-26Implement UA2005 hypervisor trapsblueswir1
2008-09-26Move also DEBUG_PCALL (see r5085)blueswir1
2008-09-22Add software and timer interrupt supportblueswir1
2008-09-22Fix arguments used in cas/casx, thanks to Igor Kovalenko for spottingblueswir1
2008-09-21Use the new concat_tl_i64 op for std and stdablueswir1
2008-09-21Use the new concat_i32_i64 op for std and stdablueswir1
2008-09-20Move signal handler prototype back to cpu.hblueswir1
2008-09-14Fix array subscript above array bounds errorblueswir1
2008-09-13Fix mulscc with high bits set in either src1 or src2blueswir1
2008-09-11Write zeros to high bits of y, based on patch by Vince Weaverblueswir1
2008-09-10Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir1
2008-09-10Partially convert float128 conversion ops to TCGblueswir1
2008-09-10Convert basic 64 bit VIS ops to TCGblueswir1
2008-09-10Convert basic 32 bit VIS ops to TCGblueswir1
2008-09-10Convert basic float32 ops to TCGblueswir1
2008-09-09Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir1
2008-09-06Fix a typo in fpsub32blueswir1
2008-09-06Convert most env fields to TCG registersblueswir1
2008-09-06Silence gcc warning about constant overflowblueswir1
2008-09-03Implement no-fault loadsblueswir1
2008-09-02Fix sign extension problems with smul and umul (Vince Weaver)blueswir1
2008-09-01Fix y register loads and storesblueswir1
2008-08-30Remove memcpy32() prototype leftover from r5109blueswir1
2008-08-29Fix FCC handling for Sparc64 target, initial patch by Vince Weaverblueswir1
2008-08-29Fix Sparc64 boot on i386 host:blueswir1
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