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2012-06-27pseries: Convert sPAPR TCEs to use generic IOMMU infrastructureDavid Gibson
The pseries platform already contains an IOMMU implementation, since it is essential for the platform's paravirtualized VIO devices. This IOMMU support is currently built into the implementation of the VIO "bus" and the various VIO devices. This patch converts this code to make use of the new common IOMMU infrastructure. We don't yet handle synchronization of map/unmap callbacks vs. invalidations, this will require some complex interaction with the kernel and is not a major concern at this stage. Cc: Alex Graf <agraf@suse.de> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-24target-ppc: Fix 2nd parameter for tcg_gen_shri_tlStefan Weil
This fixes a compiler error when QEMU was configured with --enable-debug. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24target-ppc: Fix build with --enable-debugStefan Weil
The order of the arguments was wrong (copy+paste error). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: BookE206: Bump MAS2 to 64bitAlexander Graf
On 64bit capable systems, MAS2 can actually hold a 64bit virtual page address. So increase the mask for its EPN. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: BookE: Support 32 and 64 bit wide MAS2Alexander Graf
The MAS registers on BookE are all 32 bit wide, except for MAS2, which can hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPR setting code, so that the guest can never write invalid values in them. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: Extract SPR dump generation into its own functionAlexander Graf
This patch moves the debug #ifdef'ed SPR trace generation into its own function, so we can call it from multiple places. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: Add e5500 CPU targetAlexander Graf
This patch adds e5500's CPU initialization to the TCG CPU initialization code. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: BookE: Make ivpr selectable by CPU typeAlexander Graf
IVPR can either hold 32 or 64 bit addresses, depending on the CPU type. Let the CPU initialization function pass in its mask itself, so we can easily extend it. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: BookE: Implement EPR SPRAlexander Graf
On the e500 series, accessing SPR_EPR magically turns into an access at that CPU's IACK register on the MPIC. Implement that logic to get kernels that make use of that feature work. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: Add support for MSR_CMAlexander Graf
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to support running 64bit code with MSR_CM set. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24PPC: Add some booke SPR definesAlexander Graf
The number of SPRs avaiable in different PowerPC chip is still increasing. Add definitions for the MAS7_MAS3 SPR and all currently known bits in EPCR. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc64: Rudimentary Support for extra page sizes on server CPUsBenjamin Herrenschmidt
More recent Power server chips (i.e. based on the 64 bit hash MMU) support more than just the traditional 4k and 16M page sizes. This can get quite complicated, because which page sizes are supported, which combinations are supported within an MMU segment and how these page sizes are encoded both in the SLB entry and the hash PTE can vary depending on the CPU model (they are not specified by the architecture). In addition the firmware or hypervisor may not permit use of certain page sizes, for various reasons. Whether various page sizes are supported on KVM, for example, depends on whether the PR or HV variant of KVM is in use, and on the page size of the memory backing the guest's RAM. This patch adds information to the CPUState and cpu defs to describe the supported page sizes and encodings. Since TCG does not yet support any extended page sizes, we just set this to NULL in the static CPU definitions, expanding this to the default 4k and 16M page sizes when we initialize the cpu state. When using KVM, however, we instead determine available page sizes using the new KVM_PPC_GET_SMMU_INFO call. For old kernels without that call, we use some defaults, with some guesswork which should do the right thing for existing HV and PR implementations. The fallback might not be correct for future versions, but that's ok, because they'll have KVM_PPC_GET_SMMU_INFO. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24booke_206_tlbwe: Discard invalid bits in MAS2Fabien Chouteau
The size of EPN field in MAS2 depends on page size. This patch adds a mask to discard invalid bits in EPN field. Definition of EPN field from e500v2 RM: EPN Effective page number: Depending on page size, only the bits associated with a page boundary are valid. Bits that represent offsets within a page are ignored and should be cleared. There is a similar (but more complicated) definition in PowerISA V2.06. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Make hbrev table constBlue Swirl
Lookup table 'hbrev' is never written to, so add a 'const' qualifier. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Add missing breakBlue Swirl
Add obviously missing 'break' statement. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move load and store helpers, switch to AREG0 free modeBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0 and rename op_helper.c (which only contains load and store helpers) to mem_helper.c. Remove AREG0 swapping in tlb_fill(). Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation and interrupt handling, cpu_{ld,st}{l,uw}_data in loads and stores. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move misc helpers from helper.c to misc_helper.cBlue Swirl
Move more misc helpers from helper.c to misc_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for misc helpersBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split off misc helpersBlue Swirl
Move misc helpers from op_helper.c to misc_helpers.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for timebase helpersBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split off timebase helpersBlue Swirl
Move decrementer and timebase helpers to a dedicated file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Cleanup MMU mergeBlue Swirl
Remove useless wrappers. In some cases 'int' parameters are changed to uint32_t. Make internal functions static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> [agraf: fix kvm compilation] Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move MMU helpers from helper.c to mmu_helper.cBlue Swirl
Move more MMU helpers from helper.c to mmu_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> [update to current helper.c state] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid a warning with the next patchBlue Swirl
When the code is moved together by the next patch, compiler detects a possible uninitialized variable use. Avoid the warning by initializing the variables. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for MMU etc. helpersBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split MMU etc. helpers from op_helper.cBlue Swirl
Move MMU, TLB, SLB and BAT ops to mmu_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for integer and vector helpersBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> [fix unwanted whitespace line in Makefile.target] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split integer and vector opsBlue Swirl
Move integer and vector ops to int_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for FPU and SPE helpersBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split FPU and SPE opsBlue Swirl
Move FPU and SPE helpers from op_helper.c to fpu_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move exception helpers from helper.c to excp_helper.cBlue Swirl
Move exception helpers from helper.c to excp_helper.c and make cpu_dump_rfi() static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Fix coding style in helper.cBlue Swirl
helper.c will be spilt by the next patches, fix style issues before that. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for exception helpersBlue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split exception helpersBlue Swirl
Move exception helpers from op_helper.c to excp_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Fix coding style in op_helper.cBlue Swirl
op_helper.c will be split by the next patches, fix style issues before that. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-21qemu-log: use LOG_UNIMP for some target CPU casesBlue Swirl
Use LOG_UNIMP for some target CPU cases. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Alexander Graf <agraf@suse.de>
2012-06-09target-ppc: Unbreak kvm_ppc.c buildAndreas Färber
The file is located in target-ppc/, not hw/. Signed-off-by: Andreas Färber <andreas.faerber@web.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini
Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-04Kill off cpu_state_reset()Andreas Färber
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset() was renamed to cpu_state_reset(), to allow introducing a new cpu_reset() that would operate on QOM objects. All callers have been updated except for one in target-mips, so drop all implementations except for the one in target-mips and move the declaration there until MIPSCPU reset can be fully QOM'ified. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris) Acked-by: Alexander Graf <agraf@suse.de> (for ppc) Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04target-ppc: Let cpu_ppc_init() return PowerPCCPUAndreas Färber
Adapt e500 mpc8544ds machine accordingly. Turn cpu_init() into a static inline function returning CPUPPCState for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de>
2012-05-01target-ppc: Some support for dumping TLB_EMB TLBsFrançois Revol
Add mmubooke_dump_mmu(). TODO: Add printing of individual flags. Signed-off-by: François Revol <revol@free.fr> [agraf: fix coding style] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-05-01PPC: Fix up e500 cache size settingAlexander Graf
When initializing the e500 code, we need to expose its cache line size for user and system mode, while the mmu details are only interesting for system emulation. Split the 2 switch statements apart, allowing us to #ifdef out the mmu parts for user mode emulation while keeping all cache information consistent. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-04-15target-ppc/machine.c: Drop unnecessary ifdefsJuan Quintela
machine.c is only compiled for softmmu targets, so checks for !defined(CONFIG_USER_ONLY) are unnecessary and can be dropped. Signed-off-by: Juan Quintela <quintela@redhat.com> [AF: Use more verbose commit message suggested by PMM] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15target-ppc: Init dcache and icache size for e500 user modeMeador Inge
commit f7aa558396dd0f6b7a2b22c05cb503c655854102 pulled the dcache and icache line size initialization inside of a '#if !defined(CONFIG_USER_ONLY)' block. This is not correct because instructions like 'dcbz' need the dcache size initialized even for user mode. Signed-off-by: Meador Inge <meadori@codesourcery.com> Cc: Varun Sethi <Varun.Sethi@freescale.com> [AF: Simplify #ifdefs by using cache line size 32 for *-user as before] Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15target-ppc: Fix type casts for w64 (uintptr_t)Stefan Weil
This changes nothing for other hosts. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-15target-ppc: QOM'ify CPU resetAndreas Färber
Move code from cpu_state_reset() into ppc_cpu_reset(). Reorder #include of helper_regs.h to use it in translate_init.c. Adjust whitespace and add braces. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: David Gibson <david@gibson.dropbear.id.au>
2012-04-15target-ppc: Start QOM'ifying CPU initAndreas Färber
Move code not dependent on ppc_def_t from cpu_ppc_init() into an initfn. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: David Gibson <david@gibson.dropbear.id.au>
2012-04-15target-ppc: QOM'ify CPUAndreas Färber
Embed CPUPPCState as first member of PowerPCCPU. Distinguish between "powerpc-cpu", "powerpc64-cpu" and "embedded-powerpc-cpu". Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: David Gibson <david@gibson.dropbear.id.au>
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