aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/int_helper.c
AgeCommit message (Expand)Author
2014-11-04target-ppc: Fix vcmpbfp. Unordered CaseTom Musta
2014-11-04target-ppc: Fix Altivec ShiftsTom Musta
2014-11-04target-ppc: simplify AES emulationAurelien Jarno
2014-11-04ppc: fix result of DLMZB when no zero bytes are foundPaolo Bonzini
2014-11-04ppc: use CRF_* in int_helper.cPaolo Bonzini
2014-09-08target-ppc: Implement mulldo with TCGTom Musta
2014-09-08target-ppc: Bug Fix: sradTom Musta
2014-09-08target-ppc: Bug Fix: mulldo OV DetectionTom Musta
2014-06-16target-ppc: Refactor AES InstructionsTom Musta
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-03-19target-ppc: Add missing 'static' and 'const' attributesStefan Weil
2014-03-15misc: Fix typos in commentsStefan Weil
2014-03-05target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: AES InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta
2014-03-05target-ppc: Altivec 2.07: Doubleword ComparesTom Musta
2014-03-05target-ppc: Altivec 2.07: vbpermq InstructionTom Musta
2014-03-05target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and ShiftsTom Musta
2014-03-05target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta
2014-03-05target-ppc: Altivec 2.07: vmuluw InstructionTom Musta
2014-03-05target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit IntegersTom Musta
2014-03-05target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta
2014-03-05target-ppc: Add ISA 2.06 divwe[o] InstructionsTom Musta
2014-03-05target-ppc: Add ISA 2.06 divweu[o] InstructionsTom Musta
2014-03-05target-ppc: Add ISA2.06 divde[o] InstructionsTom Musta
2014-03-05target-ppc: Add ISA2.06 divdeu[o] InstructionsTom Musta
2014-03-05target-ppc: Add ISA2.06 bpermd InstructionTom Musta
2013-04-26target-ppc: emulate cmpb instructionAurelien Jarno
2013-02-23target-ppc: Split out SO, OV, CA fields from XERRichard Henderson
2013-02-23target-ppc: Use mul*2 in mulh* insnsRichard Henderson
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
2012-10-04target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macrosAurelien Jarno
2012-10-04target-ppc: use the softfloat float32_muladd functionAurelien Jarno
2012-10-04target-ppc: use the softfloat min/max functionsAurelien Jarno
2012-10-04target-ppc: simplify NaN propagation for vector functionsAurelien Jarno
2012-06-24ppc: Make hbrev table constBlue Swirl
2012-06-24ppc: Avoid AREG0 for integer and vector helpersBlue Swirl
2012-06-24ppc: Split integer and vector opsBlue Swirl
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-23 07:53:45 +0000