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AgeCommit message (Expand)Author
2014-11-07mips: Add macros for CP0.Config3 and CP0.Config4 bitsMaciej W. Rozycki
2014-11-07mips: Respect CP0.Status.CU1 for microMIPS FP branchesMaciej W. Rozycki
2014-11-03target-mips: add MSA support to mips32r5-genericYongbok Kim
2014-11-03target-mips: add MSA MI10 format instructionsYongbok Kim
2014-11-03target-mips: add MSA 2RF format instructionsYongbok Kim
2014-11-03target-mips: add MSA VEC/2R format instructionsYongbok Kim
2014-11-03target-mips: add MSA 3RF format instructionsYongbok Kim
2014-11-03target-mips: add MSA ELM format instructionsYongbok Kim
2014-11-03target-mips: add MSA 3R format instructionsYongbok Kim
2014-11-03target-mips: add MSA BIT format instructionsYongbok Kim
2014-11-03target-mips: add MSA I5 format instructionYongbok Kim
2014-11-03target-mips: add MSA I8 format instructionsYongbok Kim
2014-11-03target-mips: add MSA branch instructionsYongbok Kim
2014-11-03target-mips: add msa_helper.cYongbok Kim
2014-11-03target-mips: add msa_reset(), global msa registerYongbok Kim
2014-11-03target-mips: add MSA opcode enumYongbok Kim
2014-11-03target-mips: stop translation after ctc1Yongbok Kim
2014-11-03target-mips: remove duplicated mips/ieee mapping functionYongbok Kim
2014-11-03target-mips: add MSA exceptionsYongbok Kim
2014-11-03target-mips: add MSA defines and data structureYongbok Kim
2014-11-03target-mips: enable features in MIPS64R6-generic CPULeon Alrae
2014-11-03target-mips: correctly handle access to unimplemented CP0 registerLeon Alrae
2014-11-03target-mips: add restrictions for possible values in registersLeon Alrae
2014-11-03target-mips: CP0_Status.CU0 no longer allows the user to access CP0Leon Alrae
2014-11-03target-mips: implement forbidden slotLeon Alrae
2014-11-03target-mips: add Config5.SBRILeon Alrae
2014-11-03target-mips: update cpu_save/cpu_load to support new registersLeon Alrae
2014-11-03target-mips: add BadInstr and BadInstrP supportLeon Alrae
2014-11-03target-mips: add TLBINV supportLeon Alrae
2014-11-03target-mips: add new Read-Inhibit and Execute-Inhibit exceptionsLeon Alrae
2014-11-03target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}Leon Alrae
2014-11-03target-mips: add RI and XI fields to TLB entryLeon Alrae
2014-11-03target-mips: distinguish between data load and instruction fetchLeon Alrae
2014-11-03target-mips: add KScratch registersLeon Alrae
2014-10-24target-mips: add ULL suffix in bitswap to avoid compiler warningLeon Alrae
2014-10-14target-mips: Remove unused gen_load_ACX, gen_store_ACX and cpu_ACXPeter Maydell
2014-10-14target-mips/dsp_helper.c: Add ifdef guards around various functionsPeter Maydell
2014-10-14target-mips/translate.c: Add ifdef guard around check_mips64()Peter Maydell
2014-10-14target-mips/op_helper.c: Remove unused do_lbu() functionPeter Maydell
2014-10-14target-mips/dsp_helper.c: Remove unused function get_DSPControl_24()Peter Maydell
2014-10-14target-mips: fix broken MIPS16 and microMIPSYongbok Kim
2014-10-14target-mips/translate.c: Update OPC_SYNCIDongxue Zhang
2014-10-14target-mips: define a new generic CPU supporting MIPS64 Release 6 ISALeon Alrae
2014-10-14target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructionsYongbok Kim
2014-10-14target-mips: do not allow Status.FR=0 mode in 64-bit FPULeon Alrae
2014-10-14target-mips: add new Floating Point Comparison instructionsYongbok Kim
2014-10-14target-mips: add new Floating Point instructionsLeon Alrae
2014-10-14target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae
2014-10-13target-mips: add compact and CP1 branchesYongbok Kim
2014-10-13target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim