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AgeCommit message (Expand)Author
2014-10-13target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae
2014-10-13target-mips: signal RI Exception on DSP and Loongson instructionsLeon Alrae
2014-10-13target-mips: split decode_opc_special* into *_r6 and *_legacyLeon Alrae
2014-10-13target-mips: extract decode_opc_special* from decode_opcLeon Alrae
2014-10-13target-mips: move LL and SC instructionsLeon Alrae
2014-10-13target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae
2014-10-13target-mips: signal RI Exception on instructions removed in R6Leon Alrae
2014-10-13target-mips: define ISA_MIPS64R6Leon Alrae
2014-10-06gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flagPeter Maydell
2014-09-25target-mips: Use cpu_exec_interrupt qom hookRichard Henderson
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova
2014-08-07target-mips: Ignore unassigned accesses with KVMJames Hogan
2014-07-28target-mips/translate.c: Free TCG in OPC_DINSVDongxue Zhang
2014-07-09mips/kvm: Disable FPU on reset with KVMJames Hogan
2014-07-05mips/kvm: Init EBase to correct KSEG0James Hogan
2014-06-20target-mips: copy CP0_Config1 into DisasContextAurelien Jarno
2014-06-20Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell
2014-06-18target-mips: implement UserLocal RegisterPetar Jovanovic
2014-06-18target-mips: Enable KVM support in build systemSanjay Lal
2014-06-18target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset()James Hogan
2014-06-18target-mips: kvm: Add main KVM support for MIPSSanjay Lal
2014-06-18target-mips: get_physical_address: Add KVM awarenessJames Hogan
2014-06-18target-mips: get_physical_address: Add defines for segment basesJames Hogan
2014-06-18target-mips: Reset CPU timer consistentlyJames Hogan
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini
2014-06-05softmmu: make do_unaligned_access a method of CPUPaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-03-27target-mips: Avoid shifting left into sign bitPeter Maydell
2014-03-25target-mips: fix MTHC1 and MFHC1 when FPU in FR=0 modePetar Jovanovic
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber
2014-03-13cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber
2014-02-10target-mips: add user-mode FR switch support for MIPS32r5Petar Jovanovic
2014-02-10target-mips: add support for CP0_Config5Petar Jovanovic
2014-02-10target-mips: add support for CP0_Config4Petar Jovanovic
2014-02-10target-mips: add CPU definition for MIPS32R5Petar Jovanovic
2013-12-21target-mips: Use new qemu_ld/st opcodesAurelien Jarno
2013-12-09target-mips: Use macro ARRAY_SIZE where possibleStefan Weil
2013-12-09target-mips: fix 64-bit FPU config for user-mode emulationPetar Jovanovic
2013-12-02misc: Replace 'struct QEMUTimer' by 'QEMUTimer'Stefan Weil
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