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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-mips
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translate.c
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Author
2009-01-04
Update FSF address in GPL/LGPL boilerplate
aurel32
2008-11-25
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
aliguori
2008-11-18
Refactor and enhance break/watchpoint API (Jan Kiszka)
aliguori
2008-11-17
TCG variable type checking.
pbrook
2008-11-15
target-mips: avoid tcg internal error in mfc0/dmfc0
aurel32
2008-11-11
Revert commits 5685 to 5688 committed by mistake
aurel32
2008-11-11
Don't stop translation for mtc0 compare
aurel32
2008-11-11
target-mips: gen_compute_branch1()
aurel32
2008-11-11
target-mips: optimize movc*()
aurel32
2008-11-11
target-mips: optimize gen_farith()
aurel32
2008-11-11
target-mips: optimize gen_muldiv()
aurel32
2008-11-11
target-mips: optimize gen_arith()/gen_arith_imm()
aurel32
2008-11-11
target-mips: convert bit shuffle ops to TCG
aurel32
2008-11-11
target-mips: convert bitfield ops to TCG
aurel32
2008-11-11
target-mips: optimize gen_op_addr_add() (2/2)
aurel32
2008-11-11
target-mips: optimize gen_op_addr_add() (1/2)
aurel32
2008-11-11
target-mips: optimize gen_save_pc()
aurel32
2008-11-11
target-mips: fix mft* helpers/call
aurel32
2008-11-11
target-mips: fix temporary variable freeing in op_ldst_##insn()
aurel32
2008-11-04
target-mips: use the new rotr/rotri instructions
aurel32
2008-09-22
Use concet TCG instructions in the MIPS target.
ths
2008-09-21
Add concat_i32_i64 op.
pbrook
2008-09-18
Use TCG registers for most CPU register accesses.
ths
2008-09-18
Move the active FPU registers into env again, and use more TCG registers
ths
2008-09-05
TCG fixes for target-mips
aurel32
2008-08-23
MIPS: don't free TCG temporary variable twice
aurel32
2008-08-01
Delete unused variable.
ths
2008-07-23
Less hardcoding of TARGET_USER_ONLY.
ths
2008-07-21
A bunch of minor code improvements in the MIPS target.
ths
2008-07-21
Fix logging output for MIPS HI, LO registers, by Stefan Weil.
ths
2008-07-20
Simplify conditional FP moves.
ths
2008-07-18
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
ths
2008-07-09
Use temporary registers for the MIPS FPU emulation.
ths
2008-07-05
Fix typo in comment.
ths
2008-07-01
Static'ify some functions, and use standard inline in translate.c.
ths
2008-07-01
Delete duplicate code.
ths
2008-06-30
Spelling fixes, spotted by Stuart Brady.
ths
2008-06-30
Make bcond and btarget TCG registers.
ths
2008-06-29
Remove unnecessary helper arguments, and fix some typos.
ths
2008-06-29
Add missing file. Fix spelling errors.
pbrook
2008-06-29
Add instruction counter.
pbrook
2008-06-27
Avoid unused input arguments which triggered tcg errors. Spotted by
ths
2008-06-27
More efficient target register / TC accesses.
ths
2008-06-24
Remove remaining uses of T0 in the MIPS target.
ths
2008-06-24
T1 is now dead.
ths
2008-06-24
Reduce use of fixed registers a bit more.
ths
2008-06-24
Use temporaries instead of fixed registers for some instructions.
ths
2008-06-23
Pass T0/T1 explicitly to helper functions, and clean up a few dyngen
ths
2008-06-20
Convert unaligned load/store to TCG.
ths
2008-06-20
Convert vr54xx multiply instructions to TCG.
ths
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