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path: root/target-mips/op_helper.c
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2007-09-06Partial support for 34K multithreading, not functional yet.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-28Simplify round/ceil/floor implementation, spotted by Fabrice Bellard.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-27Fix computation for ceil, floor and round instructions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-26Implement recip1/recip2/rsqrt1/rsqrt2.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-23Handle MIPS64 SEGBITS value correctly.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03Clean up of some target specifics in exec.c/cpu-exec.c.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-31Add proper float*_is_nan prototypes.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-28Fix ddivu for 32bit hosts, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-20Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19More MIPS 64-bit FPU support.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths
- Fix FP-conditional branches. - Check FPU register mode at runtime, not translation time, as the F64 status bit can change. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-16More generic 64 bit multiplication support, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13Full MIPS64 MMU implementation, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13MMU code improvements, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2811 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15Delete unused define.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2671 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13Nicer Log formatting.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2659 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06Save state for all CP0 instructions, they may throw a CPU exception.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Fix rotr immediate ops, mask shift/rotate arguments to their allowedths
size. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02Build fix for 64bit machines. (This is still not correct mul/div handling.)ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2587 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01Actually enable 64bit configuration.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01MIPS64 configurations.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2564 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30Sanitize mips exception handling.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-20Replace TLSZ with TARGET_FMT_lx.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-18Fix sign-extension of VPN field in TLB, by Herve Poussineau.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2433 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-23Implementing dmfc/dmtc.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-22Fix PageMask handling, second part.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2345 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-21Bring TLB / PageSize handling in line with real hardware behaviour.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2341 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-03moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - ↵bellard
suppressed invalid tb_invalidate_page_range() calls git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2287 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01Simplify code and fix formatting.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2282 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21Scrap SIGN_EXTEND32.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths
decoding. This is also the first percent towards MIPS64 support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06Dynamically translate MIPS mtc0 instructions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06Dynamically translate MIPS mfc0 instructions.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
2006-11-12Avoid redundant TLB flushes (Daniel Jacobowitz).pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2211 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26consistent update of ERL and EXLbellard
(Dirk Behme) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2028 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14MIPS FPU support (Marius Goeger)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
2006-05-22fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1937 c046a42c-6fe2-441c-8c8c-71466251a162
2006-05-22cosmetics (Thiemo Seufer)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1936 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-23removed unnecessary headerbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1835 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer).pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1778 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11e bitfields in mips TLB structures (Thiemo Seufer).pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1774 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
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