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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-arm
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2015-11-24
target-arm: Don't mask out bits [47:40] in LPAE descriptors for v8
Peter Maydell
2015-11-19
target-arm: Update condexec before arch BP check in AA32 translation
Sergey Fedorov
2015-11-19
target-arm: Update condexec before CP access check in AA32 translation
Sergey Fedorov
2015-11-12
target-arm: Update PC before calling gen_helper_check_breakpoints()
Sergey Fedorov
2015-11-10
target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code
Sergey Fedorov
2015-11-10
target-arm: Fix gdb singlestep handling in arm_debug_excp_handler()
Sergey Fedorov
2015-11-03
target-arm: Report S/NS status in the CPU debug logs
Peter Maydell
2015-11-03
target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32
Peter Maydell
2015-11-03
target-arm: Add and use symbolic names for register banks
Soren Brinkmann
2015-10-28
target-*: Advance pc after recognizing a breakpoint
Richard Henderson
2015-10-27
target-arm: Add support for S1 + S2 MMU translations
Edgar E. Iglesias
2015-10-27
target-arm: Route S2 MMU faults to EL2
Edgar E. Iglesias
2015-10-27
target-arm: Add S2 translation to 32bit S1 PTWs
Edgar E. Iglesias
2015-10-27
target-arm: Add S2 translation to 64bit S1 PTWs
Edgar E. Iglesias
2015-10-27
target-arm: Add ARMMMUFaultInfo
Edgar E. Iglesias
2015-10-27
target-arm: Avoid inline for get_phys_addr
Edgar E. Iglesias
2015-10-27
target-arm: Add support for S2 page-table protection bits
Edgar E. Iglesias
2015-10-27
target-arm: Add computation of starting level for S2 PTW
Edgar E. Iglesias
2015-10-27
target-arm: lpae: Rename granule_sz to stride
Edgar E. Iglesias
2015-10-27
target-arm: lpae: Replace tsz with computed inputsize
Edgar E. Iglesias
2015-10-27
target-arm: Add support for AArch32 S2 negative t0sz
Edgar E. Iglesias
2015-10-27
target-arm: lpae: Move declaration of t0sz and t1sz
Edgar E. Iglesias
2015-10-27
target-arm: lpae: Make t0sz and t1sz signed integers
Edgar E. Iglesias
2015-10-27
target-arm: Add HPFAR_EL2
Edgar E. Iglesias
2015-10-27
target-arm: Add support for SPSR_(ABT|UND|IRQ|FIQ)
Soren Brinkmann
2015-10-27
target-arm/translate.c: Handle non-executable page-straddling Thumb insns
Peter Maydell
2015-10-27
target-arm: Fix "no 64-bit EL2" assumption in arm_excp_unmasked()
Peter Maydell
2015-10-19
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
2015-10-19
kvm: Pass PCI device pointer to MSI routing functions
Pavel Fedin
2015-10-16
target-arm: Fix CPU breakpoint handling
Sergey Fedorov
2015-10-16
target-arm: Fix GDB breakpoint handling
Sergey Fedorov
2015-10-16
target-arm: implement arm_debug_target_el()
Sergey Fedorov
2015-10-16
target-arm: Add MDCR_EL2
Sergey Fedorov
2015-10-16
target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregs
Davorin Mista
2015-10-16
target-arm: Avoid calling arm_el_is_aa64() function for unimplemented EL
Sergey Sorokin
2015-10-16
target-arm: Break the TB after ISB to execute self-modified code correctly
Sergey Sorokin
2015-10-16
target-arm: Add missing 'static' attribute
Stefan Weil
2015-10-09
qdev: Protect device-list-properties against broken devices
Markus Armbruster
2015-10-07
tcg: Remove gen_intermediate_code_pc
Richard Henderson
2015-10-07
tcg: Pass data argument to restore_state_to_opc
Richard Henderson
2015-10-07
tcg: Add TCG_MAX_INSNS
Richard Henderson
2015-10-07
target-*: Drop cpu_gen_code define
Richard Henderson
2015-10-07
target-arm: Add condexec state to insn_start
Richard Henderson
2015-10-07
target-*: Introduce and use cpu_breakpoint_test
Richard Henderson
2015-10-07
target-*: Increment num_insns immediately after tcg_gen_insn_start
Richard Henderson
2015-10-07
target-*: Unconditionally emit tcg_gen_insn_start
Richard Henderson
2015-10-07
tcg: Rename debug_insn_start to insn_start
Richard Henderson
2015-09-25
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
2015-09-25
arm: clarify the use of muldiv64()
Laurent Vivier
2015-09-25
arm: Remove ELF_MACHINE from cpu.h
Peter Crosthwaite
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