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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-arm
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helper.c
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2014-03-10
target-arm: Fix incorrect setting of E bit in CPSR
Peter Maydell
2014-02-26
target-arm: Add support for AArch32 ARMv8 CRC32 instructions
Will Newton
2014-02-26
target-arm: Implement AArch64 view of CPACR
Peter Maydell
2014-02-26
target-arm: Store AIF bits in env->pstate for AArch32
Peter Maydell
2014-02-26
target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
Peter Maydell
2014-02-26
target-arm: Implement AArch64 dummy breakpoint and watchpoint registers
Peter Maydell
2014-02-26
target-arm: Implement AArch64 ID and feature registers
Peter Maydell
2014-02-26
target-arm: Implement AArch64 generic timers
Peter Maydell
2014-02-26
target-arm: Implement AArch64 MPIDR
Peter Maydell
2014-02-26
target-arm: Implement AArch64 TTBR*
Peter Maydell
2014-02-26
target-arm: Implement AArch64 VBAR_EL1
Peter Maydell
2014-02-26
target-arm: Implement AArch64 TCR_EL1
Peter Maydell
2014-02-26
target-arm: Implement AArch64 SCTLR_EL1
Peter Maydell
2014-02-26
target-arm: Implement AArch64 memory attribute registers
Peter Maydell
2014-02-26
target-arm: Implement AArch64 dummy MDSCR_EL1
Peter Maydell
2014-02-26
target-arm: Implement AArch64 TLB invalidate ops
Peter Maydell
2014-02-26
target-arm: Implement AArch64 cache invalidate/clean ops
Peter Maydell
2014-02-26
target-arm: Implement AArch64 MIDR_EL1
Peter Maydell
2014-02-26
target-arm: Implement AArch64 CurrentEL sysreg
Peter Maydell
2014-02-26
target-arm: A64: Make cache ID registers visible to AArch64
Peter Maydell
2014-02-26
target-arm: Fix raw read and write functions on AArch64 registers
Peter Maydell
2014-02-26
target-arm: Load correct access bits from ARMv5 level 2 page table descriptors
Peter Maydell
2014-02-26
target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS ops
Peter Maydell
2014-02-20
target-arm: Fix incorrect type for value argument to write_raw_cp_reg
Peter Maydell
2014-02-20
target-arm: Remove failure status return from read/write_raw_cp_reg
Peter Maydell
2014-02-20
target-arm: Drop success/fail return from cpreg read and write functions
Peter Maydell
2014-02-20
target-arm: Convert miscellaneous reginfo structs to accessfn
Peter Maydell
2014-02-20
target-arm: Convert generic timer reginfo to accessfn
Peter Maydell
2014-02-20
target-arm: Convert performance monitor reginfo to accessfn
Peter Maydell
2014-02-20
target-arm: Stop underdecoding ARM946 PRBS registers
Peter Maydell
2014-02-20
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
Peter Maydell
2014-02-20
target-arm: Define names for SCTLR bits
Peter Maydell
2014-02-11
exec: Make stl_*_phys input an AddressSpace
Edgar E. Iglesias
2014-02-11
exec: Make ldq/ldub_*_phys input an AddressSpace
Edgar E. Iglesias
2014-02-11
exec: Make ldl_*_phys input an AddressSpace
Edgar E. Iglesias
2014-01-31
target-arm: Add set_neon_rmode helper
Will Newton
2014-01-31
target-arm: Move arm_rmode_to_sf to a shared location.
Will Newton
2014-01-08
target-arm: A64: Add support for FCVT between half, single and double
Peter Maydell
2014-01-08
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
Peter Maydell
2014-01-08
target-arm: A64: Add floating-point<->fixed-point instructions
Alexander Graf
2014-01-08
target-arm: A64: Add extra VFP fixed point conversion helpers
Will Newton
2014-01-08
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
Peter Maydell
2014-01-08
target-arm: Rename A32 VFP conversion helpers
Will Newton
2014-01-08
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
Will Newton
2014-01-08
target-arm: remove raw_read|write duplication
Peter Crosthwaite
2014-01-08
target-arm: use c13_context field for CONTEXTIDR
Sergey Fedorov
2014-01-08
target-arm: Give the FPSCR rounding modes names
Alexander Graf
2014-01-08
target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Peter Maydell
2014-01-07
target-arm: Widen thread-local register state fields to 64 bits
Peter Maydell
2014-01-07
target-arm: A64: Implement minimal set of EL0-visible sysregs
Peter Maydell
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