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path: root/target-arm/cpu.h
AgeCommit message (Expand)Author
2014-05-27target-arm: Make esr_el1 an arrayEdgar E. Iglesias
2014-05-27target-arm: Make elr_el1 an arrayEdgar E. Iglesias
2014-05-27target-arm: Use a 1:1 mapping between EL and MMU indexEdgar E. Iglesias
2014-04-17target-arm: Implement CBAR for Cortex-A57Peter Maydell
2014-04-17target-arm: Implement AArch64 address translation operationsPeter Maydell
2014-04-17target-arm: Implement AArch64 view of CONTEXTIDRPeter Maydell
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell
2014-04-17target-arm: Implement AArch64 SPSR_EL1Peter Maydell
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell
2014-04-17target-arm: Add AArch64 ELR_EL1 register.Peter Maydell
2014-04-17target-arm: Implement AArch64 views of fault status and data registersRob Herring
2014-04-17target-arm: Use dedicated CPU state fields for ARM946 access bit registersPeter Maydell
2014-04-17target-arm: A64: Implement DC ZVAPeter Maydell
2014-04-17target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1Peter Maydell
2014-04-17target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell
2014-04-17target-arm: Define exception record for AArch64 exceptionsPeter Maydell
2014-04-17target-arm: Implement AArch64 DAIF system registerPeter Maydell
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber
2014-03-10target-arm: Implements the ARM PMCCNTR registerAlistair Francis
2014-02-26target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton
2014-02-26target-arm: Add utility function for checking AA32/64 state of an ELPeter Maydell
2014-02-26target-arm: Implement AArch64 view of CPACRPeter Maydell
2014-02-26target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell
2014-02-26target-arm: Get MMU index information correct for A64 codePeter Maydell
2014-02-26target-arm: Implement AArch64 dummy breakpoint and watchpoint registersPeter Maydell
2014-02-26target-arm: Implement AArch64 generic timersPeter Maydell
2014-02-26target-arm: Implement AArch64 TTBR*Peter Maydell
2014-02-26target-arm: Implement AArch64 VBAR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 TCR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 SCTLR_EL1Peter Maydell
2014-02-26target-arm: Implement AArch64 memory attribute registersPeter Maydell
2014-02-26target-arm: Implement AArch64 CurrentEL sysregPeter Maydell
2014-02-26target-arm: A64: Make cache ID registers visible to AArch64Peter Maydell
2014-02-26target-arm: Fix raw read and write functions on AArch64 registersPeter Maydell
2014-02-20target-arm: Drop success/fail return from cpreg read and write functionsPeter Maydell
2014-02-20target-arm: Split cpreg access checks out from read/write functionsPeter Maydell
2014-02-20target-arm: Remove unused ARMCPUState sr substructPeter Maydell
2014-02-20target-arm: Define names for SCTLR bitsPeter Maydell
2014-01-31target-arm: Move arm_rmode_to_sf to a shared location.Will Newton
2014-01-12arm: fix compile on bigendian hostAlexey Kardashevskiy
2014-01-08target-arm: Give the FPSCR rounding modes namesAlexander Graf
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell
2014-01-07target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell
2014-01-07target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell
2014-01-04target-arm: Update generic cpreg code for AArch64Peter Maydell
2013-12-17target-arm: A64: provide functions for accessing FPCR and FPSRPeter Maydell
2013-12-17target-arm: Clean up handling of AArch64 PSTATEPeter Maydell