aboutsummaryrefslogtreecommitdiff
path: root/include/hw
AgeCommit message (Expand)Author
2022-05-16virtio: drop name parameter for virtio_init()Jonah Palmer
2022-05-16virtio/vhost-user: dynamically assign VhostUserHostNotifiersAlex Bennée
2022-05-16hw/virtio/vhost-user: don't suppress F_CONFIG when supportedAlex Bennée
2022-05-16include/hw: start documenting the vhost APIAlex Bennée
2022-05-16hw/virtio: move virtio-pci.h into shared include spaceAlex Bennée
2022-05-16intel_iommu: Support IR-only mode without DMA translationDavid Woodhouse
2022-05-13cxl/cxl-host: Add memops for CFMWS region.Jonathan Cameron
2022-05-13mem/cxl_type3: Add read and write functions for associated hostmem.Jonathan Cameron
2022-05-13CXL/cxl_component: Add cxl_get_hb_cstate()Jonathan Cameron
2022-05-13pci/pcie_port: Add pci_find_port_by_pn()Jonathan Cameron
2022-05-13hw/cxl/host: Add support for CXL Fixed Memory Windows.Jonathan Cameron
2022-05-13hw/cxl/component: Add utils for interleave parameter encoding/decodingJonathan Cameron
2022-05-13acpi/cxl: Create the CEDT (9.14.1)Ben Widawsky
2022-05-13acpi/cxl: Add _OSC implementation (9.14.2)Ben Widawsky
2022-05-13hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)Ben Widawsky
2022-05-13hw/cxl/device: Implement get/set Label Storage Area (LSA)Ben Widawsky
2022-05-13hw/cxl/device: Plumb real Label Storage Area (LSA) sizingBen Widawsky
2022-05-13hw/cxl/device: Add a memory device (8.2.8.5)Ben Widawsky
2022-05-13hw/pxb: Allow creation of a CXL PXB (host bridge)Ben Widawsky
2022-05-13cxl: Machine level control on whether CXL support is enabledJonathan Cameron
2022-05-13hw/pci/cxl: Create a CXL bus typeBen Widawsky
2022-05-13hw/cxl/device: Timestamp implementation (8.2.9.3)Ben Widawsky
2022-05-13hw/cxl/device: Add memory device utilitiesBen Widawsky
2022-05-13hw/cxl/device: Implement basic mailbox (8.2.8.4)Ben Widawsky
2022-05-13hw/cxl/device: Implement the CAP array (8.2.8.1-2)Ben Widawsky
2022-05-13hw/cxl/device: Introduce a CXL device (8.2.8)Ben Widawsky
2022-05-13hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)Ben Widawsky
2022-05-13hw/pci/cxl: Add a CXL component type (interface)Ben Widawsky
2022-05-12machine: make memory-backend a link propertyPaolo Bonzini
2022-05-12machine: add boot compound propertyPaolo Bonzini
2022-05-12machine: use QAPI struct for boot configurationPaolo Bonzini
2022-05-12hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XENBernhard Beschow
2022-05-11Clean up decorations and whitespace around header guardsMarkus Armbruster
2022-05-11Clean up ill-advised or unusual header guardsMarkus Armbruster
2022-05-11Clean up header guards that don't match their file nameMarkus Armbruster
2022-05-09virtio-scsi: move request-related items from .h to .cStefan Hajnoczi
2022-05-09virtio-scsi: clean up virtio_scsi_handle_cmd_vq()Stefan Hajnoczi
2022-05-09virtio-scsi: clean up virtio_scsi_handle_ctrl_vq()Stefan Hajnoczi
2022-05-09virtio-scsi: clean up virtio_scsi_handle_event_vq()Stefan Hajnoczi
2022-05-09virtio-scsi: don't waste CPU polling the event virtqueueStefan Hajnoczi
2022-05-08lasi: move from hw/hppa to hw/miscMark Cave-Ayland
2022-05-08dino: move from hw/hppa to hw/pci-hostMark Cave-Ayland
2022-05-07pc: remove -soundhw pcspkPaolo Bonzini
2022-05-07build: move vhost-scsi configuration to KconfigPaolo Bonzini
2022-05-06vfio/common: Rename VFIOGuestIOMMU::iommu into ::iommu_mrYi Liu
2022-05-05ppc/xive: Update the state of the External interrupt signalFrederic Barrat
2022-05-03aspeed/hace: Support AST1030 HACESteven Lee
2022-05-02aspeed/hace: Support AST2600 HACESteven Lee
2022-05-02aspeed/hace: Support HMAC Key Buffer register.Steven Lee
2022-05-02aspeed/soc : Add AST1030 supportSteven Lee
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-14 16:18:42 +0000