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QEMU is a generic and open source machine & userspace emulator and virtualizer
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opentitan.h
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2023-06-13
hw/riscv/opentitan: Correct OpenTitanState parent type/size
Philippe Mathieu-Daudé
2023-06-13
hw/riscv/opentitan: Explicit machine type definition
Philippe Mathieu-Daudé
2023-06-13
hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition
Philippe Mathieu-Daudé
2023-02-07
include/hw/riscv/opentitan: update opentitan IRQs
Wilfred Mallawa
2023-01-06
hw/riscv/opentitan: add aon_timer base unimpl
Wilfred Mallawa
2023-01-06
hw/riscv/opentitan: bump opentitan
Wilfred Mallawa
2022-09-27
hw/riscv: opentitan: Expose the resetvec as a SoC property
Alistair Francis
2022-09-07
hw/riscv: opentitan: bump opentitan version
Wilfred Mallawa
2022-04-22
riscv: opentitan: Connect opentitan SPI Host
Wilfred Mallawa
2022-03-03
hw: riscv: opentitan: fixup SPI addresses
Wilfred Mallawa
2021-10-22
hw/riscv: opentitan: Update to the latest build
Alistair Francis
2021-07-15
hw/riscv: opentitan: Add the flash alias
Alistair Francis
2021-07-15
hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri
Alistair Francis
2021-06-24
hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer
Alistair Francis
2021-05-11
hw/opentitan: Update the interrupt layout
Alistair Francis
2020-12-17
riscv/opentitan: Update the OpenTitan memory layout
Alistair Francis
2020-09-18
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
Eduardo Habkost
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
2020-08-27
opentitan: Rename memmap enum constants
Eduardo Habkost
2020-06-19
riscv/opentitan: Connect the UART device
Alistair Francis
2020-06-19
riscv/opentitan: Connect the PLIC device
Alistair Francis
2020-06-03
riscv: Initial commit of OpenTitan machine
Alistair Francis