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2020-08-24hw/arm/smmuv3: Advertise SMMUv3.2 range invalidationEric Auger
Expose the RIL bit so that the guest driver uses range invalidation. Although RIL is a 3.2 features, We let the AIDR advertise SMMUv3.1 support as v3.x implementation is allowed to implement features from v3.(x+1). Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-12-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 supportEric Auger
HAD is a mandatory features with SMMUv3.1 if S1P is set, which is our case. Other 3.1 mandatory features come with S2P which we don't have. So let's support HAD and advertise SMMUv3.1 support in AIDR. HAD support allows the CD to disable hierarchical attributes, ie. if the HAD0/1 bit is set, the APTable field of table descriptors walked through TTB0/1 is ignored. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-11-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 supportEric Auger
Add the support for AIDR register. It currently advertises SMMU V3.0 spec. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-10-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmuv3: Fix IIDR offsetEric Auger
The SMMU IIDR register is at 0x018 offset. Fixes: 10a83cb9887 ("hw/arm/smmuv3: Skeleton") Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-9-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmuv3: Get prepared for range invalidationEric Auger
Enhance the smmu_iotlb_inv_iova() helper with range invalidation. This uses the new fields passed in the NH_VA and NH_VAA commands: the size of the range, the level and the granule. As NH_VA and NH_VAA both use those fields, their decoding and handling is factorized in a new smmuv3_s1_range_inval() helper. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-8-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helperEric Auger
Let's introduce an helper for S1 IOVA range invalidation. This will be used for NH_VA and NH_VAA commands. It decodes the same fields, trace, calls the UNMAP notifiers and invalidate the corresponding IOTLB entries. At the moment, we do not support 3.2 range invalidation yet. So it reduces to a single IOVA invalidation. Note the leaf bit now is also decoded for the CMD_TLBI_NH_VAA command. At the moment it is only used for tracing. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-7-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmu-common: Manage IOTLB block entriesEric Auger
At the moment each entry in the IOTLB corresponds to a page sized mapping (4K, 16K or 64K), even if the page belongs to a mapped block. In case of block mapping this unefficiently consumes IOTLB entries. Change the value of the entry so that it reflects the actual mapping it belongs to (block or page start address and size). Also the level/tg of the entry is encoded in the key. In subsequent patches we will enable range invalidation. This latter is able to provide the level/tg of the entry. Encoding the level/tg directly in the key will allow to invalidate using g_hash_table_remove() when num_pages equals to 1. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-6-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB valueEric Auger
Introduce a specialized SMMUTLBEntry to store the result of the PTW and cache in the IOTLB. This structure extends the generic IOMMUTLBEntry struct with the level of the entry and the granule size. Those latter will be useful when implementing range invalidation. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-5-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmu: Introduce smmu_get_iotlb_key()Eric Auger
Introduce the smmu_get_iotlb_key() helper and the SMMU_IOTLB_ASID() macro. Also move smmu_get_iotlb_key and smmu_iotlb_key_hash in the IOTLB related code section. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-4-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmu-common: Add IOTLB helpersEric Auger
Add two helpers: one to lookup for a given IOTLB entry and one to insert a new entry. We also move the tracing there. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-3-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/arm/smmu-common: Factorize some code in smmu_ptw_64()Eric Auger
Page and block PTE decoding can share some code. Let's first handle table PTE and factorize some code shared by page and block PTEs. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200728150815.11446-2-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-24hw/cpu/a9mpcore: Verify the machine use Cortex-A9 coresPhilippe Mathieu-Daudé
The 'Cortex-A9MPCore internal peripheral' block can only be used with Cortex A5 and A9 cores. As we don't model the A5 yet, simply check the machine cpu core is a Cortex A9. If not return an error. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200709152337.15533-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-23Merge remote-tracking branch ↵Peter Maydell
'remotes/alistair/tags/pull-riscv-to-apply-20200821-1' into staging The first RISC-V PR for the 5.2 window. This includes: - NaNBox fixes - Vector extension improvements - a L2 cache controller - PMP fixes - Upgrade to OpenSBI v0.8 and the generic platform - Fixes for the Ibex PLIC # gpg: Signature made Sat 22 Aug 2020 06:38:18 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20200821-1: hw/intc: ibex_plic: Honour source priorities hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines hw/intc: ibex_plic: Update the pending irqs target/riscv: Change the TLB page size depends on PMP entries. target/riscv: Fix the translation of physical address gitlab-ci/opensbi: Update GitLab CI to build generic platform hw/riscv: spike: Change the default bios to use generic platform image hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware roms/opensbi: Upgrade from v0.7 to v0.8 configure: Create symbolic links for pc-bios/*.elf files riscv: Fix bug in setting pmpcfg CSR for RISCV64 hw/riscv: sifive_u: Add a dummy L2 cache controller device target/riscv: check before allocating TCG temps target/riscv: Clean up fmv.w.x target/riscv: Check nanboxed inputs in trans_rvf.inc.c target/riscv: Check nanboxed inputs to fp helpers target/riscv: Generate nanboxed results from trans_rvf.inc.c target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s target/riscv: Generate nanboxed results from fp helpers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-22Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sd-next-20200821' ↵Peter Maydell
into staging SD/MMC patches - Convert legacy SD host controller to the SDBus API - Move legacy API to a separate "sdcard_legacy.h" header - Introduce methods to access multiple bytes on SDBus data lines - Fix 'switch function' group location - Fix SDSC maximum card size (2GB) CI jobs result: https://gitlab.com/philmd/qemu/-/pipelines/180605963 # gpg: Signature made Fri 21 Aug 2020 18:27:50 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/sd-next-20200821: (23 commits) hw/sd: Correct the maximum size of a Standard Capacity SD Memory Card hw/sd: Fix incorrect populated function switch status data structure hw/sd: Use sdbus_read_data() instead of sdbus_read_byte() when possible hw/sd: Add sdbus_read_data() to read multiples bytes on the data line hw/sd: Use sdbus_write_data() instead of sdbus_write_byte when possible hw/sd: Add sdbus_write_data() to write multiples bytes on the data line hw/sd: Rename sdbus_read_data() as sdbus_read_byte() hw/sd: Rename sdbus_write_data() as sdbus_write_byte() hw/sd: Rename read/write_data() as read/write_byte() hw/sd: Move sdcard legacy API to 'hw/sd/sdcard_legacy.h' hw/sd/sdcard: Make sd_data_ready() static hw/sd/pl181: Replace disabled fprintf()s by trace events hw/sd/pl181: Do not create SD card within the SD host controller hw/sd/pl181: Expose a SDBus and connect the SDCard to it hw/sd/pl181: Use named GPIOs hw/sd/pl181: Add TODO to use Fifo32 API hw/sd/pl181: Rename pl181_send_command() as pl181_do_command() hw/sd/pl181: Replace fprintf(stderr, "*\n") with error_report() hw/sd/milkymist: Do not create SD card within the SD host controller hw/sd/milkymist: Create the SDBus at init() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-22Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue 2020-08-19 Regular post-release changes: * hw: add compat machines for 5.2 (Cornelia Huck) Features: * qmp: Expose MachineClass::default_ram_id (Michal Privoznik) Cleanups: * qdev: Document qdev_prop_set_drive_err() return value (Philippe Mathieu-Daudé) # gpg: Signature made Wed 19 Aug 2020 16:21:55 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: hw: add compat machines for 5.2 qmp: Expose MachineClass::default_ram_id qdev: Document qdev_prop_set_drive_err() return value Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-21hw/intc: ibex_plic: Honour source prioritiesAlistair Francis
This patch follows what commit aa4d30f6618dc "riscv: plic: Honour source priorities" does and ensures that the highest priority interrupt will be serviced first. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Cc: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <a697ca8a31eff8eb18a88e09a28206063cf85d48.1595655188.git.alistair.francis@wdc.com>
2020-08-21hw/intc: ibex_plic: Don't allow repeat interrupts on claimed linesAlistair Francis
Once an interrupt has been claimed, but before it has been compelted we shouldn't receive any more pending interrupts. This patche keeps track of this to ensure that we don't see any more interrupts until it is completed. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <394c3f070615ff2b4fab61a1cf9cb48c122913b7.1595655188.git.alistair.francis@wdc.com>
2020-08-21hw/intc: ibex_plic: Update the pending irqsAlistair Francis
After a claim or a priority change we need to update the pending interrupts. This is based on the same patch for the SiFive PLIC: 55765822804f5a58594e "riscv: plic: Add a couple of mising sifive_plic_update calls" Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Cc: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <0693aa700a4c67c49b3f1c973a82b257fdb7198d.1595655188.git.alistair.francis@wdc.com>
2020-08-21hw/riscv: spike: Change the default bios to use generic platform imageBin Meng
To keep sync with other RISC-V machines, change the default bios to use generic platform fw_dynamic.elf image. While we are here, add some comments to mention that using ELF files for the Spike machine was intentional. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1596439832-29238-6-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-08-21hw/riscv: Use pre-built bios image of generic platform for virt & sifive_uBin Meng
Update virt and sifive_u machines to use the opensbi fw_dynamic bios image built for the generic FDT platform. Remove the out-of-date no longer used bios images. Note: 1. To test 32-bit Linux kernel on QEMU 'sifive_u' 32-bit machine, the following patch is needed: http://lists.infradead.org/pipermail/linux-riscv/2020-July/001213.html 2. To test 64-bit Linux 5.3 kernel on QEMU 'virt' or 'sifive_u' 64-bit machines, the following commit should be cherry-picked to 5.3: commit 922b0375fc93fb1a20c5617e37c389c26bbccb70 Author: Albert Ou <aou@eecs.berkeley.edu> Date: Fri Sep 27 16:14:18 2019 -0700 riscv: Fix memblock reservation for device tree blob Linux 5.4 or above already contains this commit/fix. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1596439832-29238-5-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-08-21hw/riscv: sifive_u: Add a dummy L2 cache controller deviceBin Meng
It is enough to simply map the SiFive FU540 L2 cache controller into the MMIO space using create_unimplemented_device(), with an FDT fragment generated, to make the latest upstream U-Boot happy. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1595227748-24720-1-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-08-21hw/sd: Correct the maximum size of a Standard Capacity SD Memory CardBin Meng
Per the SD spec, Standard Capacity SD Memory Card (SDSC) supports capacity up to and including 2 GiB. Fixes: 2d7adea4fe ("hw/sd: Support SDHC size cards") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Message-Id: <1598021136-49525-2-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-08-21hw/sd: Fix incorrect populated function switch status data structureBin Meng
At present the function switch status data structure bit [399:376] are wrongly pupulated. These 3 bytes encode function switch status for the 6 function groups, with 4 bits per group, starting from function group 6 at bit 399, then followed by function group 5 at bit 395, and so on. However the codes mistakenly fills in the function group 1 status at bit 399. This fixes the code logic. Fixes: a1bb27b1e9 ("SD card emulation (initial implementation)") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Message-Id: <1598021136-49525-1-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-08-21hw/sd: Use sdbus_read_data() instead of sdbus_read_byte() when possiblePhilippe Mathieu-Daudé
Use the recently added sdbus_read_data() to read multiple bytes at once, instead of looping calling sdbus_read_byte(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-8-f4bug@amsat.org>
2020-08-21hw/sd: Add sdbus_read_data() to read multiples bytes on the data linePhilippe Mathieu-Daudé
Add a sdbus_read_data() method to read multiple bytes on the data line of a SD bus. We might improve the tracing later, for now keep logging each byte individually. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-7-f4bug@amsat.org>
2020-08-21hw/sd: Use sdbus_write_data() instead of sdbus_write_byte when possiblePhilippe Mathieu-Daudé
Use the recently added sdbus_write_data() to write multiple bytes at once, instead of looping calling sdbus_write_byte(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-6-f4bug@amsat.org>
2020-08-21hw/sd: Add sdbus_write_data() to write multiples bytes on the data linePhilippe Mathieu-Daudé
Add a sdbus_write_data() method to write multiple bytes on the data line of a SD bus. We might improve the tracing later, for now keep logging each byte individually. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-5-f4bug@amsat.org>
2020-08-21hw/sd: Rename sdbus_read_data() as sdbus_read_byte()Philippe Mathieu-Daudé
The sdbus_read_data() method do a single byte access on the data line of a SD bus. Rename it as sdbus_read_byte() and document it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-4-f4bug@amsat.org>
2020-08-21hw/sd: Rename sdbus_write_data() as sdbus_write_byte()Philippe Mathieu-Daudé
The sdbus_write_data() method do a single byte access on the data line of a SD bus. Rename it as sdbus_write_byte() and document it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-3-f4bug@amsat.org>
2020-08-21hw/sd: Rename read/write_data() as read/write_byte()Philippe Mathieu-Daudé
The read/write_data() methods write do a single byte access on the data line of a SD card. Rename them as read/write_byte(). Add some documentation (not in "hw/sd/sdcard_legacy.h" which we are going to remove soon). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200814092346.21825-2-f4bug@amsat.org>
2020-08-21hw/sd: Move sdcard legacy API to 'hw/sd/sdcard_legacy.h'Philippe Mathieu-Daudé
omap_mmc.c is the last device left using the legacy sdcard API. Move the prototype declarations into a separate header, to make it clear this is a legacy API. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180216022933.10945-8-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-21hw/sd/sdcard: Make sd_data_ready() staticPhilippe Mathieu-Daudé
sd_data_ready() belongs to the legacy API. As its last user has been converted to the SDBus API, make it static. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180216022933.10945-7-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-21hw/sd/pl181: Replace disabled fprintf()s by trace eventsPhilippe Mathieu-Daudé
Convert disabled DPRINTF() to trace events and remove ifdef'ry. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705204630.4133-9-f4bug@amsat.org>
2020-08-21hw/sd/pl181: Do not create SD card within the SD host controllerPhilippe Mathieu-Daudé
SD/MMC host controllers provide a SD Bus to plug SD cards, but don't come with SD card plugged in :) Let the machine/board model create and plug the SD cards when required. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705204630.4133-8-f4bug@amsat.org>
2020-08-21hw/sd/pl181: Expose a SDBus and connect the SDCard to itPhilippe Mathieu-Daudé
Convert the controller to the SDBus API: - add the a TYPE_PL181_BUS object of type TYPE_SD_BUS, - adapt the SDBusClass set_inserted/set_readonly handlers - create the bus in the PL181 controller - switch legacy sd_*() API to the sdbus_*() API. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705204630.4133-7-f4bug@amsat.org>
2020-08-21hw/sd/pl181: Use named GPIOsPhilippe Mathieu-Daudé
To make the code easier to manage/review/use, rename the cardstatus[0] variable as 'card_readonly' and name the GPIO "card-read-only". Similarly with cardstatus[1], renamed as 'card_inserted' and name its GPIO "card-inserted". Adapt the users accordingly by using the qdev_init_gpio_out_named() function. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705204630.4133-6-f4bug@amsat.org>
2020-08-21hw/sd/pl181: Add TODO to use Fifo32 APIPhilippe Mathieu-Daudé
Add TODO to use Fifo32 API from "qemu/fifo32.h". Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705204630.4133-4-f4bug@amsat.org>
2020-08-21hw/sd/pl181: Rename pl181_send_command() as pl181_do_command()Philippe Mathieu-Daudé
pl181_send_command() do a bus transaction (send or receive), rename it as pl181_do_command(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705204630.4133-3-f4bug@amsat.org>
2020-08-21hw/sd/pl181: Replace fprintf(stderr, "*\n") with error_report()Alistair Francis
Replace a large number of the fprintf(stderr, "*\n" calls with error_report(). The functions were renamed with these commands and then compiler issues where manually fixed. find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + Some lines where then manually tweaked to pass checkpatch. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <488ba8d4c562ea44119de8ea0f385a898bd8fa1e.1513790495.git.alistair.francis@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Peter Maydell <peter.maydell@linaro.org>
2020-08-21hw/sd/milkymist: Do not create SD card within the SD host controllerPhilippe Mathieu-Daudé
SD/MMC host controllers provide a SD Bus to plug SD cards, but don't come with SD card plugged in :) Let the machine/board model create and plug the SD cards when required. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20200705211016.15241-5-f4bug@amsat.org>
2020-08-21hw/sd/milkymist: Create the SDBus at init()Philippe Mathieu-Daudé
We don't need to wait until realize() to create the SDBus, create it in init() directly. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20200705211016.15241-4-f4bug@amsat.org>
2020-08-21hw/lm32/milkymist: Un-inline milkymist_memcard_create()Philippe Mathieu-Daudé
As we will modify milkymist_memcard_create(), move it first to the source file where it is used. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20200705211016.15241-2-f4bug@amsat.org>
2020-08-21hw/sd/pxa2xx_mmci: Trivial simplificationPhilippe Mathieu-Daudé
Avoid declaring PXA2xxMMCIState local variable, return it directly. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705213350.24725-3-f4bug@amsat.org>
2020-08-21hw/sd/pxa2xx_mmci: Do not create SD card within the SD host controllerPhilippe Mathieu-Daudé
SD/MMC host controllers provide a SD Bus to plug SD cards, but don't come with SD card plugged in :) The machine/board object is where the SD cards are created. Since the PXA2xx is not qdevified, for now create the cards in pxa270_init() which is the SoC model. In the future we will move this to the board model. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200705213350.24725-2-f4bug@amsat.org>
2020-08-21meson: convert hw/arch*Marc-André Lureau
Each architecture's sourceset is placed in an hw_arch dictionary, and picked up from there when building the per-emulator static_library. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-08-21meson: convert hw/9pfs, cleanupMarc-André Lureau
hw/Makefile.objs is gone so there is more code that can be removed. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-08-21meson: convert hw/acpiMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-08-21meson: convert hw/adcMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-08-21meson: convert hw/audioMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-08-21meson: convert hw/blockMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-21 18:13:58 +0000