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AgeCommit message (Expand)Author
2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster
2020-12-18hw/intc/arm_gicv3_kvm: silence the compiler warningsChen Qun
2020-12-17intc/ibex_plic: Clear interrupts that occur during claim processAlistair Francis
2020-12-15target/nios2: Move IIC code into CPU object properPeter Maydell
2020-12-14xive: Add trace eventsCédric Le Goater
2020-12-14spapr/xics: Drop unused argument to xics_kvm_has_broken_disconnect()Greg Kurz
2020-12-14spapr/xive: Turn some sanity checks into assertionsGreg Kurz
2020-12-10i386: do not use ram_size globalPaolo Bonzini
2020-12-10hw/intc/armv7m_nvic: Implement read/write for RAS register blockPeter Maydell
2020-12-10target/arm: Implement M-profile "minimal RAS implementation"Peter Maydell
2020-12-10hw/intc/armv7m_nvic: Fix "return from inactive handler" checkPeter Maydell
2020-12-10hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bitPeter Maydell
2020-12-10target/arm: Implement v8.1M REVIDR registerPeter Maydell
2020-12-10hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell
2020-12-10hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFaultPeter Maydell
2020-11-23hw/intc: fix heap-buffer-overflow in rxicu_realize()Chen Qun
2020-11-18Revert series "spapr/xive: Allocate vCPU IPIs from the vCPU contexts"Greg Kurz
2020-11-15nomaintainer: Fix Lesser GPL version numberChetan Pant
2020-11-15arm tcg cpus: Fix Lesser GPL version numberChetan Pant
2020-11-15non-virt: Fix Lesser GPL version numberChetan Pant
2020-11-13intc/ibex_plic: Ensure we don't loose interruptsAlistair Francis
2020-11-13intc/ibex_plic: Fix some typos in the commentsAlistair Francis
2020-11-09hw/intc/ibex_plic: Clear the claim register when readAlistair Francis
2020-11-04Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-fixes-20201103'...Peter Maydell
2020-11-03hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/writeAlexChen
2020-11-03target/riscv: Add sifive_plic vmstateYifei Jiang
2020-11-02hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts workPeter Maydell
2020-10-22hw/intc: Move sifive_plic.h to the include directoryBin Meng
2020-10-20hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbersPhilippe Mathieu-Daudé
2020-10-20hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlersPhilippe Mathieu-Daudé
2020-10-01hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUsPeter Maydell
2020-10-01target/arm: Move id_pfr0, id_pfr1 into ARMISARegistersPeter Maydell
2020-09-23qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost
2020-09-18sifive: Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-18sifive: Move QOM typedefs and add missing includesEduardo Habkost
2020-09-13Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...Peter Maydell
2020-09-09hw/riscv: Move sifive_plic model to hw/intcBin Meng
2020-09-09hw/riscv: Move sifive_clint model to hw/intcBin Meng
2020-09-09omap_intc: Use typedef name for instance_sizeEduardo Habkost
2020-09-09Use DECLARE_*CHECKER* when possible (--force mode)Eduardo Habkost
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2020-09-08spapr/xive: Allocate vCPU IPIs from the vCPU contextsCédric Le Goater
2020-09-08spapr/xive: Allocate IPIs independently from the other sourcesCédric Le Goater
2020-09-08spapr/xive: Use kvmppc_xive_source_reset() in post_loadCédric Le Goater
2020-09-08spapr/xive: Modify kvm_cpu_is_enabled() interfaceCédric Le Goater
2020-09-08spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priorityCédric Le Goater
2020-09-01hw/intc: fix default registers value in exynos4210_combiner_read()Chen Qun
2020-09-01hw: Remove superfluous breaksLiao Pingfang