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2013-12-10cpu/a9mpcore: Add Global TimerFrançois LEGAL
Add the global timer to A9 MPCore. Signed-off-by: François LEGAL <devel@thom.fr.eu.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: ff92f35f438ac671b57d99d823723dd3e62d2c49.1385969450.git.peter.crosthwaite@xilinx.com [PC Changes: * new commit message * split off original version as a separate patch * Rebased against new mpcore implementation (with struct embedding) ] Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10cpu/a9mpcore: reorder operations/declarationsPeter Crosthwaite
To make it consistent for easier code reading. The order in which variables are defined and functions are called is set to match the address map ordering. The new consistent order of doing stuff is: SCU -> GIC -> MPTimer -> WDT. 0 functional change. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 8f31398e6d9a93f57291399f269039da1a77a2b5.1385969450.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10cpu/a9mpcore: rename timerbusdev variablePeter Crosthwaite
Rename this variable for consistency with the above defined mptimerdev variable. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 28939ef95589a62414634e86c47cef76b21b15f7.1385969450.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-11-05arm11mpcore: Split off RealView MPCoreAndreas Färber
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Prepare for QOM embeddingAndreas Färber
Move state struct, type constant and cast macro to a new header. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Convert mpcore_rirq_state to QOM realizeAndreas Färber
Embed ARM11MPCorePriveState and RealViewGICState and replace SysBus initfn with realizefn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Convert ARM11MPCorePriveState to QOM realizeAndreas Färber
Embed child devices and replace SysBus initfn with realizefn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Split off SCU deviceAndreas Färber
Inspired by a9scu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Create container MemoryRegion in instance_initAndreas Färber
This allows to map the region directly after object initialization. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Drop unused fieldsAndreas Färber
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05arm11mpcore: Fix typo in MemoryRegion nameAndreas Färber
"mpcode" -> "mpcore" Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05a15mpcore: Prepare for QOM embeddingAndreas Färber
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a15mpcore: Convert to QOM realizeAndreas Färber
Turn SysBusDevice initfn into a QOM realizefn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a15mpcore: Embed GICStateAndreas Färber
This covers both emulated and KVM GIC. Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a15mpcore: Split off instance_initAndreas Färber
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a9mpcore: Prepare for QOM embeddingAndreas Färber
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a9mpcore: Convert to QOM realizeAndreas Färber
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a9mpcore: Embed ARMMPTimerStateAndreas Färber
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a9mpcore: Embed A9SCUStateAndreas Färber
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a9mpcore: Embed GICStateAndreas Färber
Prepares for conversion to QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a9mpcore: Split off instance_initAndreas Färber
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-09-03Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori
QOM CPUState refactorings / X86CPU * Conversion of global CPU list to QTAILQ - preparing for CPU hot-unplug * Document X86CPU magic numbers for CPUID cache info # gpg: Signature made Tue 03 Sep 2013 10:59:22 AM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (3) and Eduardo Habkost (1) # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: target-i386: Use #defines instead of magic numbers for CPUID cache info cpu: Replace qemu_for_each_cpu() cpu: Use QTAILQ for CPU list a15mpcore: Use qemu_get_cpu() for generic timers
2013-09-03a15mpcore: Use qemu_get_cpu() for generic timersAndreas Färber
This simplifies the loop and aids with refactoring of CPU list. Requested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-30qdev: Pass size to qbus_create_inplace()Andreas Färber
To be passed to object_initialize(). Since commit 39355c3826f5d9a2eb1ce3dc9b4cdd68893769d6 the argument is void*, so drop some superfluous (BusState *) casts or direct parent field usages. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-20default-configs: Fix A9MP and A15MP config namesPeter Maydell
When individual CONFIG_ switches for the A9MPcore and A15MPcore devices were created, they were inadvertently given incorrect names (CONFIG_ARM9MPCORE and CONFIG_ARM15MPCORE). These CPUs are "Cortex-A9MP" and "Cortex-A15MP", and in particular the ARM9 is a different (rather older) CPU than the Cortex-A9. Rename the CONFIG_ switches to bring them into line with the source file names and CPU names. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1376056215-26391-1-git-send-email-peter.maydell@linaro.org
2013-08-20hw/cpu/a15mpcore: Wire generic timer outputs to GIC inputsPeter Maydell
Now our A15 CPU implements the generic timers, we can wire them up to the appropriate inputs on the GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 1376065080-26661-5-git-send-email-peter.maydell@linaro.org
2013-07-29arm11mpcore: QOM cast cleanups for mpcore_rirq_stateAndreas Färber
Introduce a type constant, use QOM casts, rename the parent field and prepare for QOM realize. Reviewed-by: Hu Tao <hutao@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29arm11mpcore: QOM cast cleanups for ARM11MPCorePriveStateAndreas Färber
Introduce a type constant, use QOM casts and rename the parent field. Reviewed-by: Hu Tao <hutao@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29cpu/a15mpcore: QOM cast cleanupAndreas Färber
Introduce type constant and cast macro and rename A15MPPrivState::busdev field to parent_obj to enforce its use. Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-07-29cpu/a9mpcore: QOM casting cleanupAndreas Färber
Introduce type constant and cast macro and enforce its use by renaming A9MPPrivState::busdev field to parent_obj. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-07-29devices: Associate devices to their logical categoryMarcel Apfelbaum
The category will be used to sort the devices displayed in the command line help. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Message-id: 1375107465-25767-4-git-send-email-marcel.a@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-15hw/cpu/a15mpcore: Correct default value for num-irqPeter Maydell
The a15mpcore device claims that its default value for num-irq is the number of interrupts used by the A15MP in the vexpress-a15 board. However that chip has 128 external interrupts, not 64. Since there is only one A15 based model in QEMU currently, we can fix this by simply changing the default value. This error was causing recent (3.10) Linux kernels to print warnings/backtraces when the number of interrupts reported by the GIC was smaller than an interrupt number they wanted to use. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373032481-15280-1-git-send-email-peter.maydell@linaro.org
2013-07-04hw/c*: pass owner to memory_region_init* functionsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-05-01target-i386: Move APIC to ICC busIgor Mammedov
It allows APIC to be hotplugged. * map APIC's mmio at board level if it is present * do not register mmio region for each APIC, since only one is used/mapped Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Introduce ICC bus/device/bridgeIgor Mammedov
Provides a hotpluggable bus for APIC and CPU. * icc-bridge will serve as a parent for icc-bus and provide mmio mapping services to child icc-devices. * icc-device will replace SysBusDevice as a parent of APIC and IOAPIC devices. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-08hw: move ARM CPU cores to hw/cpu/, configure with default-configs/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: make subdirectories for devicesPaolo Bonzini
Prepare the new directory structure. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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