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2012-04-25Beautify makefile commands for generation of files with tracetoolLluís Vilanova
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-24config-host.mak: rename datadir to qemu_datadirEduardo Habkost
Autoconf concept of "datadir" is supposed to be "$prefix/share", not "$prefix/share/PACKAGE", so using datadir for the Qemu-specific directory is confusing. The current C code that uses CONFIG_QEMU_DATADIR should be safe, as now create_config generates the same #define name (CONFIG_QEMU_DATADIR) for both "datadir" and "qemu_datadir" variables. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-24target-microblaze: QOM'ify CPUAndreas Färber
Embed CPUMBState as first member of QOM MicroBlazeCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> [AF: Updated cpu.c to include cpu-qom.h indirectly via cpu.h]
2012-04-24target-cris: QOM'ify CPUAndreas Färber
Embed CPUCRISState as first member of QOM CRISCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-23Merge remote-tracking branch 'origin/master' into stagingAnthony Liguori
* origin/master: (27 commits) target-arm: Move reset handling to arm_cpu_reset target-arm: Drop cpu_reset_model_id() target-arm: Move cache ID register setup to cpu specific init fns target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset target-arm: Move feature register setup to per-CPU init fns target-arm: Move iWMMXT wCID reset to cpu_state_reset target-arm: Drop JTAG_ID documentation target-arm: Move SCTLR reset value setup to per cpu init fns target-arm: Move CTR setup to per cpu init fns target-arm: Move MVFR* setup to per cpu init fns target-arm: Move FPSID config to cpu init fns target-arm: Move feature bit settings to CPU init fns target-arm: Add QOM subclasses for each ARM cpu implementation target-arm: remind to keep arm features in sync with linux-user/elfload.c tci: GETPC() macro must return an uintptr_t gdbstub: Synchronize CPU state unconditionally in gdb_set_cpu_pc softfloat: make USE_SOFTFLOAT_STRUCT_TYPES compile target-xtensa: add tests for LOOPNEZ and LOOPGTZ target-xtensa: fix LOOPNEZ/LOOPGTZ translation qtest: add m48t59 tests for Sparc ...
2012-04-20realview: break out versatile i2c controller codeOskar Andero
The versatile i2c controller implementation was separated to its own file called versatile_i2c.c. This is done as a preparation for adding i2c support to the versatilepb board. Signed-off-by: Oskar Andero <oskar.andero@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-18tracetool: Rewrite infrastructure as python modulesLluís Vilanova
The tracetool script is written in shell and has hit several portability problems due to shell quirks or external tools across host platforms. Additionally the amount of string processing and lack of real data structures makes it tough to implement code generator backends for tracers that are more complex. This patch replaces the shell version of tracetool with a Python version. The new tracetool design is: scripts/tracetool.py - top-level script scripts/tracetool/backend/ - tracer backends live here (simple, ust) scripts/tracetool/format/ - output formats live here (.c, .h) There is common code for trace-events definition parsing so that backends can focus on generating code rather than parsing input. Support for all existing backends (nop, stderr, simple, ust, and dtrace) is added back in follow-up patches. [Commit description written by Stefan Hajnoczi] Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-16Merge remote-tracking branch 'sstabellini/for_anthony' into stagingAnthony Liguori
* sstabellini/for_anthony: xen: introduce an event channel for buffered io event notifications xen-mapcache: don't unmap locked entry during mapcache invalidation Xen, mapcache: Fix the compute of the size of bucket. xen: handle backend deletion from xenstore Xen: Add xen-apic support and hook it up. Xen: basic HVM MSI injection support.
2012-04-15target-alpha: QOM'ify CPUAndreas Färber
Embed CPUAlphaState as first member of AlphaCPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Richard Henderson <rth@twiddle.net>
2012-04-15target-xtensa: add dc233c coreMax Filippov
This is Diamond 233L Standard Core Rev.C (LE), implemented through linux/gdb overlay. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14Merge branch 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensaBlue Swirl
* 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa: target-xtensa: Start QOM'ifying CPU init target-xtensa: QOM'ify CPU reset target-xtensa: QOM'ify CPU target-xtensa: improve unit tests debugging target-xtensa: Move helpers.h to helper.h
2012-04-14Merge branch 'arm-devs.for-upstream' of ↵Blue Swirl
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/arm_gic: Remove stray hardcoded tab hw/arm_gic: gic_set_pending_private() is NVIC only hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define hw/arm_gic: Make gic_reset a sysbus reset function hw/arm11mpcore: Convert to using sysbus GIC device hw/exynos4210_gic: Convert to using sysbus GIC hw/realview_gic: switch to sysbus GIC hw/a9mpcore: Switch to using sysbus GIC hw/a15mpcore: switch to using sysbus GIC hw/arm_gic: Make the GIC its own sysbus device hw/arm_gic: Expose PPI inputs as gpio inputs hw/arm_gic: Move gic_get_current_cpu into arm_gic.c hw/arm_gic: Move NCPU definition to arm_gic.c hw/exynos4210_combiner.c: Drop excessive read/write access check. ARM: Exynos4210: Drop gic_cpu_write() after initialization. Fix bit test in Exynos4210 UART emulation to use & instead of &&
2012-04-14target-xtensa: QOM'ify CPUAndreas Färber
Embed CPUXtensaState as first member of XtensaCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-04-13Xen: Add xen-apic support and hook it up.Wei Liu
Signed-off-by: Wei Liu <wei.liu2@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
2012-04-13hw/arm_gic: Make the GIC its own sysbus devicePeter Maydell
Compile arm_gic.c as a standalone C file to produce a self contained sysbus GIC device. Support the legacy usage by #include of the .c file by making those users #define LEGACY_INCLUDED_GIC, so we can convert them one by one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
2012-04-12target-lm32: QOM'ify CPUAndreas Färber
Embed CPULM32State as first member of QOM LM32CPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc>
2012-04-10target-i386: Rename cpuid.cAndreas Färber
Name it cpu.c to align with other QOM'ified targets. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-07target-sparc: Rename cpu_init.cAndreas Färber
Align QOM'ified targets, with a view to simplify Makefile.target. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-04target-s390x: QOM'ify CPUAndreas Färber
Embed CPUS390XState as first member of S390CPU. Since -cpu is being ignored, make TYPE_S390_CPU non-abstract. Signed-off-by: Andreas Färber <afaerber@suse.de> Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
2012-04-02Merge remote-tracking branch 'stefanha/tracing' into stagingAnthony Liguori
* stefanha/tracing: tracetool: dtrace: handle in and next reserved words tracetool: dtrace disabled-events fix Makefile.target: code stp dependency on trace-events
2012-03-31Merge branch 'qom-cpu-unicore32.v3' of git://github.com/afaerber/qemu-cpuBlue Swirl
* 'qom-cpu-unicore32.v3' of git://github.com/afaerber/qemu-cpu: target-unicore32: Move CPU-dependent init into initfn target-unicore32: QOM'ify CPU target-unicore32: License future contributions under GPLv2+ target-unicore32: Relicense to GPLv2+ MAINTAINERS: Add entry for UniCore32
2012-03-30Makefile.target: code stp dependency on trace-eventsAlon Levy
Signed-off-by: Alon Levy <alevy@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-30target-unicore32: QOM'ify CPUAndreas Färber
Embed CPUUniCore32State as first member of UniCore32CPU. Contributed under GPLv2+. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-03-29target-arm: Minimalistic CPU QOM'ificationAndreas Färber
Introduce only one non-abstract type TYPE_ARM_CPU and do not touch cp15 registers to not interfere with Peter's ongoing remodelling. Embed CPUARMState as first (additional) field of ARMCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-24target-alpha: Move memory helpers to mem_helper.c.Richard Henderson
This completes the transition away from AREG0. This patch must be last because it requires CONFIG_TCG_PASS_AREG0 set too. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24target-alpha: Move palcode support helpers to sys_helper.c.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24target-alpha: Move floating-point helpers to fpu_helper.c.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24target-alpha: Move integer helpers to int_helper.c.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-19get rid of CONFIG_VIRTIO_SCSIPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-18Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl
Adjust generation of load and store templates so that the functions take a parameter for CPUState instead of relying on global env. Remove wrappers. Move remaining memory helpers to ldst_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18Sparc: avoid AREG0 for memory access helpersBlue Swirl
Make memory access helpers take a parameter for CPUState instead of relying on global env. Introduce wrappers for load and store ops. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-13Merge remote-tracking branch 'kraxel/usb.44' into stagingAnthony Liguori
* kraxel/usb.44: Endian fix an assertion in usb-msd uhci: alloc can't fail, drop check. uhci: new uhci_handle_td return code for tds still in flight uhci: renumber uhci_handle_td return codes uhci: use enum for uhci_handle_td return codes uhci: tracing support uhci: cancel on schedule stop. uhci: fix uhci_async_cancel_all uhci: pass addr to uhci_async_alloc usb: improve packet state sanity checks usb-ohci: DMA writeback bug fixes usb-ehci: drop unused isoch_pause variable usb: zap hw/ush-{ohic,uhci}.h + init wrappers usb: the big rename
2012-03-13qom: Add QOM support to user emulatorsAndreas Färber
Link the Object base class and the module infrastructure for class registration. Introduce $(universal-obj-y) for objects that are more common than $(common-obj-y), so that those only get built once. Call QOM module init for type registration. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-13usb: the big renameGerd Hoffmann
Reorganize usb source files. Create a new hw/usb/ directory and move all usb source code to that place. Also make filenames a bit more descriptive. Host adapters are prefixed with "hch-" now, usb device emulations are prefixed with "dev-". Fixup paths Makefile and include paths to make it compile. No code changes. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-07kvm: x86: Add user space part for in-kernel i8254Jan Kiszka
This provides the required user space stubs to enable the in-kernel i8254 emulation of KVM. The in-kernel model supports lost tick compensation according to the "delay" policy. This is enabled by default and can be switched off via a device property. Depending on the feature set of the host kernel (before 2.6.32), we may have to disable the HPET or lack sound output from the PC speaker. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-03-07xilinx_zynq: machine model initial versionPeter A. G. Crosthwaite
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific system level control register (SLCR) module. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07cadence_gem: initial version of device modelPeter A. G. Crosthwaite
Device model for cadence gem ethernet controller. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07cadence_ttc: initial version of device modelPeter A. G. Crosthwaite
Implemented cadence Triple Timer Counter (TCC) Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-07cadence_uart: initial version of device modelPeter A. G. Crosthwaite
Implemented cadence UART serial controller Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-05microblaze: factored out common boot codePeter A. G. Crosthwaite
factored out the copy-pasted common boot code from the two microblaze platforms into a dedicated microblaze bootloader (microblaze_boot.o). Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-03Merge branch 'arm-devs.for-upstream' of ↵Blue Swirl
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/arm11mpcore: Fix broken realview_mpcore/arm11mpcore_priv properties arm: add device tree support arm: make sure that number of irqs can be represented in GICD_TYPER. arm: clean up GIC constants
2012-03-02arm: add device tree supportGrant Likely
If compiled with CONFIG_FDT, allow user to specify a device tree file using the -dtb argument. If the machine supports it then the dtb will be loaded into memory and passed to the kernel on boot. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> [Peter Maydell: Use machine opt rather than global to pass dtb filename] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-01Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori
* qemu-kvm/uq/master: pc-bios: update kvmvapic.bin kvmvapic: Use optionrom helpers optionsrom: Reserve space for checksum kvmvapic: Simplify mp/up_set_tpr kvmvapic: Introduce TPR access optimization for Windows guests kvmvapic: Add option ROM target-i386: Add infrastructure for reporting TPR MMIO accesses Allow to use pause_all_vcpus from VCPU context Process pending work while waiting for initial kick-off in TCG mode Remove useless casts from cpu iterators kvm: Set cpu_single_env only once kvm: Synchronize cpu state in kvm_arch_stop_on_emulation_error()
2012-02-24Merge remote-tracking branch 'bonzini/virtio-scsi' into stagingAnthony Liguori
* bonzini/virtio-scsi: scsi-block: always use scsi_generic_ops for cache != none scsi: fix searching for an empty id scsi: fix wrong return for target INQUIRY virtio-scsi: add migration support virtio-scsi: process control queue requests virtio-scsi: add basic SCSI bus operation virtio-scsi: Add basic request processing infrastructure virtio-scsi: Add virtio-scsi stub device scsi-disk: add migration support scsi-generic: add migration support scsi: add SCSIDevice vmstate definitions scsi-disk: enable scatter/gather functionality scsi: add scatter/gather functionality scsi: pass residual amount to command_complete ahci: use new DMA helpers dma-helpers: add accounting wrappers dma-helpers: add dma_buf_read and dma_buf_write dma-helpers: make QEMUSGList target independent
2012-02-22jazz-led: compile it only twiceHervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22hw/pc: move rom init to pc_sysfw.cJordan Justen
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22virtio-scsi: Add virtio-scsi stub deviceStefan Hajnoczi
Add a useless virtio SCSI HBA device: qemu -device virtio-scsi-pci Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-02-18kvmvapic: Introduce TPR access optimization for Windows guestsJan Kiszka
This enables acceleration for MMIO-based TPR registers accesses of 32-bit Windows guest systems. It is mostly useful with KVM enabled, either on older Intel CPUs (without flexpriority feature, can also be manually disabled for testing) or any current AMD processor. The approach introduced here is derived from the original version of qemu-kvm. It was refactored, documented, and extended by support for user space APIC emulation, both with and without KVM acceleration. The VMState format was kept compatible, so was the ABI to the option ROM that implements the guest-side para-virtualized driver service. This enables seamless migration from qemu-kvm to upstream or, one day, between KVM and TCG mode. The basic concept goes like this: - VAPIC PV interface consisting of I/O port 0x7e and (for KVM in-kernel irqchip) a vmcall hypercall is registered - VAPIC option ROM is loaded into guest - option ROM activates TPR MMIO access reporting via port 0x7e - TPR accesses are trapped and patched in the guest to call into option ROM instead, VAPIC support is enabled - option ROM TPR helpers track state in memory and invoke hypercall to poll for pending IRQs if required Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-17hw/a15mpcore.c: Add Cortex-A15 private peripheral modelPeter Maydell
Add a model of the Cortex-A15 memory mapped private peripheral space. This is fairly simple because the only memory mapped bit of the A15 is the GIC. Note that we don't currently model a VGIC and therefore don't map the VGIC related bits of the GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17Exynos4210: added display controller implementationMitsyanko Igor
Exynos4210 display controller (FIMD) has 5 hardware windows with alpha and chroma key blending functions. Signed-off-by: Mitsyanko Igor <i.mitsyanko@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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