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2018-07-03hw/timer: Add basic M41T80 emulationBALATON Zoltan
Basic emulation of the M41T80 serial (I2C) RTC chip. Only getting time of day is implemented. Setting time and RTC alarm are not supported. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-27MAINTAINERS: update target-mips maintainersAleksandar Markovic
Yongbok Kim transfers duties of QEMU for target MIPS maintainer to myself as he leaves MIPS. Many thanks to Yongbok for his substantial contributing to QEMU for MIPS over many years and taking care of its maintainance for almost two years. Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com> Acked-by: Yongbok Kim <yongbok.kim@mips.com> Reviewed-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
2018-06-26MAINTAINERS: Add ASPEED BMCsJoel Stanley
This adds Cedric as the maintainer, with Andrew and I as reviewers, for the ASPEED boards and the peripherals we have developed. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-id: 20180625140055.32223-1-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26MAINTAINERS: Adopt the Gumstix computers-on-module machinesPhilippe Mathieu-Daudé
These COMs are hard to find, and the companie dropped the support few years ago. Per the "Gumstix Product Changes, Known Issues, and EOL" pdf: - Phasing out: PXA270-based Verdex product line September 2012 - Phasing out: PXA255-based Basix & Connex September 2009 However there are still booting SD card image availables, very convenient to stress test the QEMU SD card implementation. Therefore I volunteer to keep an eye on this file, while it is useful for testing. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180606144706.29732-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-22Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2018-06-22' into ↵Peter Maydell
staging QAPI patches for 2018-06-22 # gpg: Signature made Fri 22 Jun 2018 15:36:22 BST # gpg: using RSA key 3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2018-06-22: MAINTAINERS: Update QAPI stanza for commit fb0bc835e56 qapi/introspect: Eliminate pointless variable in .visit_end() Revert commit d4e5ec877ca qapi: Open files with encoding='utf-8' qapi: remove empty flat union branches and types qapi: allow empty branches in flat unions tests: Add QDict clone-flatten test qdict: Make qdict_flatten() shallow-clone-friendly qapi/events: generate event enum in main module qapi/visit: remove useless prefix argument Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-22MAINTAINERS: Update QAPI stanza for commit fb0bc835e56Markus Armbruster
Commit fb0bc835e56 moved code from scripts/qapi-*.py to scripts/qapi/*.py. It neglected to update MAINTAINERS: scripts/qapi* matches only the former, not the latter. Do that now. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180620124827.17106-1-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2018-06-22hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection ControllerPeter Maydell
Implement the Arm TrustZone Memory Protection Controller, which sits in front of RAM and allows secure software to configure it to either pass through or reject transactions. We implement the MPC as a QEMU IOMMU, which will direct transactions either through to the devices and memory behind it or to a special "never works" AddressSpace if they are blocked. This initial commit implements the skeleton of the device: * it always permits accesses * it doesn't implement most of the registers * it doesn't implement the interrupt or other behaviour for blocked transactions Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20180620132032.28865-2-peter.maydell@linaro.org
2018-06-22Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-tcg-testing-revivial-210618-2' into staging Add check-tcg machinary This restores the ability to run TCG smoke tests by using our docker infrastructure to support cross building simple tests. It represents the first step to making better cross-architecture testing available straight from the source tree ;-) v2 - fix quoting of target_compiler - make docker.py Py3 safe - tweak .travis.yml recipe - don't probe docker when HAVE_USER_DOCKER not set # gpg: Signature made Thu 21 Jun 2018 07:23:45 BST # gpg: using RSA key FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-tcg-testing-revivial-210618-2: (57 commits) .travis.yml: add check-tcg test tests/docker/Makefile.include: only force SID to NOCACHE if old docker: docker.py adding age check command tests/Makefile: call sub-makes with SKIP_DOCKER_BUILD=1 docker: docker.py add check sub-command docker: docker.py don't conflate checksums for extra_files docker: docker.py use "version" to probe usage tests: add top-level make dependency for docker builds tests/tcg/i386: extend timeout for runcom test tests/tcg: override runners for broken tests tests/tcg: add run, diff, and skip helper macros tests/Makefile.include: add [build|clean|check]-tcg targets Makefile.target: add (clean-/build-)guest-tests targets tests/tcg/Makefile: update to be called from Makefile.target tests/tcg: enable building for PowerPC docker: move debian-powerpc-cross to sid based build tests/tcg: enable building for RISCV64 tests/tcg: enable building for mips64 tests/tcg: enable building for sparc64 tests/tcg: enable building for sh4 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-21docs/interop: add nbd.txtVladimir Sementsov-Ogievskiy
Describe new metadata namespace: "qemu". Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20180609151758.17343-7-vsementsov@virtuozzo.com> Reviewed-by: Eric Blake <eblake@redhat.com> [eblake: grammar tweaks] Signed-off-by: Eric Blake <eblake@redhat.com>
2018-06-20Makefile.target: add (clean-/build-)guest-tests targetsAlex Bennée
Now all the build infrastructure is in place we can build tests for each guest that we support. That support mainly depends on having cross compilers installed or docker setup. To keep all the logic for that together we put the rules in tests/tcg/Makefile.include and include it from the main Makefile.target. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg/Makefile: update to be called from Makefile.targetAlex Bennée
This make is now invoked from each individual target make with the appropriate CC and EXTRA_CFLAGS set for each guest. It then includes additional Makefile.targets from: - tests/tcg/multiarch (always) - tests/tcg/$(TARGET_BASE_ARCH) (if available) - tests/tcg/$(TARGET_NAME) The order is important as the later Makefile's may want to suppress TESTS from its base arch profile. Each included Makefile.target is responsible for adding TESTS as well as defining any special build instructions for individual tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg: enable building for AArch64Alex Bennée
We only have compilers for the (default) little endian variants. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg: move ARM specific tests into subdirAlex Bennée
These only need to be built for ARM guests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-06-20tests/tcg/x86_64: add Makefile.targetAlex Bennée
The sources for x86_64 are shared in the i386 directory which will be included thanks to TARGET_BASE_ARCH. However not all sources build so we need to filter out the ones we can't build in the 64 bit world and those that can't be built for 32 bit. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg: move i386 specific tests into subdirAlex Bennée
These only need to be built for i386 guests. This includes a stub tests/tcg/i386/Makfile.target which absorbs some of what was in tests/tcg/Makefile. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-06-20tests/tcg: move architecture independent tests into subdirAlex Bennée
We will want to build these for all supported guest architectures so lets move them all into one place. We also drop test_path at this point because it needs qemu utils and glib bits which is hard to support for cross compiling. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-06-18Add ramfb MAINTAINERS entryGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-id: 20180613122948.18149-5-kraxel@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-06-15qobject: Move block-specific qdict code to block-qdict.cMarkus Armbruster
Pure code motion, except for two brace placements and a comment tweaked to appease checkpatch. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2018-06-12MAINTAINERS: Add entries for the MOS6522 VIA devicePhilippe Mathieu-Daudé
Introduced in 51f233ec92c. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12MAINTAINERS: Add an entry for the MacIO device headersPhilippe Mathieu-Daudé
Missed while moved in 7092e84d42b. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-08MAINTAINERS: Add the cdrom-test to John's sectionThomas Huth
The cdrom-test checks various block types - IDE, SCSI and virtio, so it's a little bit hard to decide where this should belong to in the MAINTAINERS file. But John volunteered to take it, so let's put it into the IDE section for now. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08slirp: Add Samuel Thibault's staging tree for slirpSamuel Thibault
Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Acked-by: Thomas Huth <thuth@redhat.com>
2018-05-31MAINTAINERS: Add entries for newer MPS2 boards and devicesPeter Maydell
Add entries to MAINTAINERS to cover the newer MPS2 boards and the new devices they use. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180518153157.14899-1-peter.maydell@linaro.org
2018-05-24Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180524-pull-request' ↵Peter Maydell
into staging vga: catch depth 0 hw/display: add new bochs-display device some cleanups. # gpg: Signature made Thu 24 May 2018 16:45:46 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180524-pull-request: MAINTAINERS: add vga entries bochs-display: add pcie support bochs-display: add dirty tracking support hw/display: add new bochs-display device vga-pci: use PCI_VGA_MMIO_SIZE vga: move bochs vbe defines to header file vga: catch depth 0 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-05-24Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc, pci, virtio, vhost: fixes, features Beginning of merging vDPA, new PCI ID, a new virtio balloon stat, intel iommu rework fixing a couple of security problems (no CVEs yet), fixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 23 May 2018 15:41:32 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (28 commits) intel-iommu: rework the page walk logic util: implement simple iova tree intel-iommu: trace domain id during page walk intel-iommu: pass in address space when page walk intel-iommu: introduce vtd_page_walk_info intel-iommu: only do page walk for MAP notifiers intel-iommu: add iommu lock intel-iommu: remove IntelIOMMUNotifierNode intel-iommu: send PSI always even if across PDEs nvdimm: fix typo in label-size definition contrib/vhost-user-blk: enable protocol feature for vhost-user-blk hw/virtio: Fix brace Werror with clang 6.0.0 libvhost-user: Send messages with no data vhost-user+postcopy: Use qemu_set_nonblock virtio: support setting memory region based host notifier vhost-user: support receiving file descriptors in slave_read vhost-user: add Net prefix to internal state structure linux-headers: add kvm header for mips linux-headers: add unistd.h on all arches update-linux-headers.sh: unistd.h, kvm consistency ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-05-24MAINTAINERS: add vga entriesGerd Hoffmann
Add entries for standard vga, virtio-gpu and cirrus. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180522165058.15404-7-kraxel@redhat.com
2018-05-23util: implement simple iova treePeter Xu
Introduce a simplest iova tree implementation based on GTree. CC: QEMU Stable <qemu-stable@nongnu.org> Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2018-05-23job: Add lifecycle QMP commandsKevin Wolf
This adds QMP commands that control the transition between states of the job lifecycle. Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2018-05-23job: Introduce qapi/job.jsonKevin Wolf
This adds a separate schema file for all job-related definitions that aren't tied to the block layer. For a start, move the enums JobType, JobStatus and JobVerb. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2018-05-23job: Create Job, JobDriver and job_create()Kevin Wolf
This is the first step towards creating an infrastructure for generic background jobs that aren't tied to a block device. For now, Job only stores its ID and JobDriver, the rest stays in BlockJob. The following patches will move over more parts of BlockJob to Job if they are meaningful outside the context of a block job. BlockJob.driver is now redundant, but this patch leaves it around to avoid unnecessary churn. The next patches will get rid of almost all of its uses anyway so that it can be removed later with much less churn. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com>
2018-05-10MAINTAINERS: Add trace-events and qemu-option-trace.texi to tracing sectionThomas Huth
The "trace-events" and "qemu-option-trace.texi" files in the top directory are currently "unmaintained" according to scripts/get_maintainer.pl. They obviously belong to the Tracing section, so add an entry for them there. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1525840700-30635-1-git-send-email-thuth@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2018-05-03MAINTAINERS: update Marcel Apfelbaum emailMarcel Apfelbaum
Use my gmail account for maintainer tasks. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Message-Id: <20180426084523.10565-1-marcel@redhat.com> Reviewed-by: Yuval Shaia <yuval.shaia@oracle.com>
2018-03-27MAINTAINERS: add include/block/aio-wait.hStefan Hajnoczi
The include/block/aio-wait.h header file was added by commit 7719f3c968c59e1bcda7e177679dc765b59e578f ("block: extract AIO_WAIT_WHILE() from BlockDriverState") without updating MAINTAINERS. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 20180312132204.23683-1-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2018-03-17Merge remote-tracking branch 'remotes/xtensa/tags/20180316-xtensa' into stagingPeter Maydell
target/xtensa linux-user support. - small cleanup for xtensa registers dumping (-d cpu); - add support for debugging linux-user process with xtensa-linux-gdb (as opposed to xtensa-elf-gdb), which can only access unprivileged registers; - enable MTTCG for target/xtensa; - cleanup in linux-user/mmap area making sure that it works correctly with limited 30-bit-wide user address space; - import xtensa-specific definitions from the linux kernel, conditionalize user-only/softmmu-only code and add handlers for signals, exceptions, process/thread creation and core registers dumping. # gpg: Signature made Fri 16 Mar 2018 16:46:19 GMT # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20180316-xtensa: MAINTAINERS: fix W: address for xtensa qemu-binfmt-conf.sh: add qemu-xtensa target/xtensa: add linux-user support linux-user: drop unused target_msync function linux-user: fix target_mprotect/target_munmap error return values linux-user: fix assertion in shmdt linux-user: fix mmap/munmap/mprotect/mremap/shmat target/xtensa: support MTTCG target/xtensa: use correct number of registers in gdbstub target/xtensa: mark register windows in the dump target/xtensa: dump correct physical registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # linux-user/syscall.c
2018-03-16MAINTAINERS: fix W: address for xtensaMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-03-12hw/isa/superio: Add the SMC FDC37C669 Super I/OPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-23-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12MAINTAINERS: Split the Alpha TCG/machine sectionPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-22-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12MAINTAINERS: Add entries for the VT82C686B Super I/OPhilippe Mathieu-Daudé
So far, it is only used by the MIPS Fulong 2E mini PC. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-21-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12hw/isa/superio: Add a Super I/O template based on the PC87312 devicePhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-9-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12MAINTAINERS: Fix the PC87312 include pathPhilippe Mathieu-Daudé
Missed while moving it in 0d09e41a51aa. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-5-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12hw/input/i8042: Extract declarations from i386/pc.h into input/i8042.hPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> (hw/ppc) Message-Id: <20180308223946.26784-4-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12hw/dma/i8257: Rename DMA_init() to i8257_dma_init()Philippe Mathieu-Daudé
- Move the header from hw/isa/ to hw/dma/ - Remove the old i386/pc dependency - use a bool type for the high_page_enable argument Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-3-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-12hw/isa: Move parallel_hds_isa_init() to hw/char/parallel-isa.cPhilippe Mathieu-Daudé
Again... (after 07dc788054d7 and 9157eee1b1c0). We now extract the ISA bus specific helpers. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-2-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-03-09MAINTAINERS: Add entries for SD (SDHCI, SDBus, SDCard)Philippe Mathieu-Daudé
After spending months studying all the different SD Specifications from the SD Association, voluntarily add myself as maintainer for the SD code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180309153654.13518-9-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-07RISC-V MaintainersMichael Clark
Add Michael Clark, Palmer Dabbelt, Sagar Karandikar and Bastian Koppelmann as RISC-V Maintainers. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-01Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20180301' into staging target-arm queue: * update MAINTAINERS for Alistair's new email address * add Arm v8.2 FP16 arithmetic extension for linux-user * implement display connector emulation for vexpress board * xilinx_spips: Enable only two slaves when reading/writing with stripe * xilinx_spips: Use 8 dummy cycles with the QIOR/QIOR4 commands * hw: register: Run post_write hook on reset # gpg: Signature made Thu 01 Mar 2018 11:22:46 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180301: (42 commits) MAINTAINERS: Update my email address linux-user: Report AArch64 FP16 support via hwcap bits target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPU arm/translate-a64: add all single op FP16 to handle_fp_1src_half arm/translate-a64: implement simd_scalar_three_reg_same_fp16 arm/translate-a64: add all FP16 ops in simd_scalar_pairwise arm/translate-a64: add FP16 FMOV to simd_mod_imm arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16 arm/helper.c: re-factor rsqrte and add rsqrte_f16 arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 arm/translate-a64: add FP16 FRECPE arm/helper.c: re-factor recpe and add recepe_f16 arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16 arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16 arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16 arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16 arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 arm/translate-a64: initial decode for simd_two_reg_misc_fp16 arm/translate-a64: add FP16 x2 ops for simd_indexed ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-01MAINTAINERS: Update my email addressAlistair Francis
I am leaving Xilinx, so to avoid having an email address that bounces update my maintainer address to point to my personal email address. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 7bb690382e3370aa1c1e047a84e36603c787ec0e.1519749987.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-01Merge remote-tracking branch ↵Peter Maydell
'remotes/stefanberger/tags/pull-tpm-2018-02-21-2' into staging Merge tpm 2018/02/21 v2 # gpg: Signature made Tue 27 Feb 2018 13:50:28 GMT # gpg: using RSA key 75AD65802A0B4211 # gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211 * remotes/stefanberger/tags/pull-tpm-2018-02-21-2: tests: add test for TPM TIS device tests: Move common TPM test code into tpm-emu.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-23maintainers: Add myself as a OpenBSD maintainerBrad Smith
Add myself as an OpenBSD maintainer and add OpenBSD as maintained. Signed-off-by: Brad Smith <brad@comstyle.com> Reviewed-by: Kamil Rytarowski <n54@gmx.com> Message-id: 20180216164620.GA53727@humpty.home.comstyle.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-02-21tests: add test for TPM TIS deviceStefan Berger
Move the TPM TIS related register and flag #defines into include/hw/acpi/tpm.h for access by the test case. Write a test case that covers the TIS functionality. Add the tests cases to the MAINTAINERS file. Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-01 07:32:21 +0000