| Age | Commit message (Expand) | Author |
|---|
| 2021-06-21 | target/arm: Implement MVE VMULL | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VHADD, VHSUB | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VABD | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VMAX, VMIN | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VRMULH | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VMULH | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VADD, VSUB, VMUL | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VDUP | Peter Maydell |
| 2021-06-21 | tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64 | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VNEG | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VABS | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VMVN (register) | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VREV16, VREV32, VREV64 | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VCLS | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VCLZ | Peter Maydell |
| 2021-06-21 | target/arm: Implement widening/narrowing MVE VLDR/VSTR insns | Peter Maydell |
| 2021-06-21 | target/arm: Implement MVE VLDR/VSTR (non-widening forms) | Peter Maydell |
| 2021-06-21 | target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m() | Peter Maydell |
| 2021-06-21 | target/arm: Split vfp_access_check() into A and M versions | Peter Maydell |
| 2021-06-21 | target/arm: Factor FP context update code out into helper function | Peter Maydell |
| 2021-06-21 | target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access | Peter Maydell |
| 2021-06-21 | target/arm: Don't NOCP fault for FPCXT_NS accesses | Peter Maydell |
| 2021-06-21 | target/arm: Handle FPU being disabled in FPCXT_NS accesses | Peter Maydell |
| 2021-06-21 | target/arm/translate-vfp.c: Whitespace fixes | Peter Maydell |
| 2021-06-21 | docs/system/arm: Document which architecture extensions we emulate | Peter Maydell |
| 2021-06-21 | target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors | Peter Maydell |
| 2021-06-21 | hw/acpi: Provide function acpi_ghes_present() | Peter Maydell |
| 2021-06-21 | hw/acpi: Provide stub version of acpi_ghes_record_errors() | Peter Maydell |
| 2021-06-21 | Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' ... | Peter Maydell |
| 2021-06-21 | Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'... | Peter Maydell |
| 2021-06-21 | MAINTAINERS: Add qtest/arm-cpu-features.c to ARM TCG CPUs section | Philippe Mathieu-Daudé |
| 2021-06-21 | s390x/css: Add passthrough IRB | Eric Farman |
| 2021-06-21 | s390x/css: Refactor IRB construction | Eric Farman |
| 2021-06-21 | s390x/css: Split out the IRB sense data | Eric Farman |
| 2021-06-21 | s390x/css: Introduce an ESW struct | Eric Farman |
| 2021-06-21 | linux-user/s390x: Save and restore psw.mask properly | Richard Henderson |
| 2021-06-21 | target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub | Richard Henderson |
| 2021-06-21 | target/s390x: Improve s390_cpu_dump_state vs cc_op | Richard Henderson |
| 2021-06-21 | target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask | Richard Henderson |
| 2021-06-21 | target/s390x: Expose load_psw and get_psw_mask to cpu.h | Richard Henderson |
| 2021-06-21 | configure: Check whether we can compile the s390-ccw bios with -msoft-float | Thomas Huth |
| 2021-06-21 | s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 | David Hildenbrand |
| 2021-06-21 | s390x/tcg: We support Vector enhancements facility | David Hildenbrand |
| 2021-06-21 | linux-user: elf: s390x: Prepare for Vector enhancements facility | David Hildenbrand |
| 2021-06-21 | s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) | David Hildenbrand |
| 2021-06-21 | s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT) | David Hildenbrand |
| 2021-06-21 | s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) | David Hildenbrand |
| 2021-06-21 | s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE | David Hildenbrand |
| 2021-06-21 | s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION | David Hildenbrand |
