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2014-02-08rules.mak: Support .cc as a C++ source file suffixPeter Maydell
The A64 disassembler libvixl uses .cc as its suffix for C++ source files, so add support for it (we already support .cpp). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08arm_gic: Add GICC_APRn state to the GICStateChristoffer Dall
The GICC_APRn registers are not currently supported by the ARM GIC v2.0 emulation. This patch adds the missing state. Note that we also change the number of APRs to use a define GIC_NR_APRS based on the maximum number of preemption levels. This patch also adds RAZ/WI accessors for the four registers on the emulated CPU interface. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08vmstate: Add uint32 2D-array supportChristoffer Dall
Add support for saving VMState of 2D arrays of uint32 values. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08arm_gic: Support setting/getting binary point regChristoffer Dall
Add a binary_point field to the gic emulation structure and support setting/getting this register now when we have it. We don't actually support interrupt grouping yet, oh well. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08arm_gic: Keep track of SGI sourcesChristoffer Dall
Right now the arm gic emulation doesn't keep track of the source of an SGI (which apparently Linux guests don't use, or they're fine with assuming CPU 0 always). Add the necessary matrix on the GICState structure and maintain the data when setting and clearing the pending state of an IRQ and make the state visible to the guest. Note that we always choose to present the source as the lowest-numbered CPU in case multiple cores have signalled the same SGI number to a core on the system. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08arm_gic: Fix GIC pending behaviorChristoffer Dall
The existing implementation of the pending behavior in gic_set_irq, gic_complete_irq, and the distributor pending set/clear registers does not follow the semantics of the GICv2.0 specs, but may implement the 11MPCore support. Therefore, maintain the existing semantics for 11MPCore and v7M NVIC and change the behavior to be in accordance with the GICv2.0 specs for "generic implementations" (s->revision == 1 || s->revision == 2). Generic implementations distinguish between setting a level-triggered interrupt pending through writes to the GICD_ISPENDR and when hardware raises the interrupt line. Writing to the GICD_ICPENDR will not cause the interrupt to become non-pending if the line is still active, and conversely, if the line is deactivated but the interrupt is marked as pending through a write to GICD_ISPENDR, the interrupt remains pending. Handle this situation in the GIC_TEST_PENDING (which now becomes a static inline named gic_test_pending) and let the 'pending' field correspond only to the latched state of the D-flip flop in the GICv2.0 specs Figure 4-10. The following changes are added: gic_test_pending: Make this a static inline and split out the 11MPCore from the generic behavior. For the generic behavior, consider interrupts pending if: ((s->irq_state[irq].pending & (cm) != 0) || (!GIC_TEST_EDGE_TRIGGER(irq) && GIC_TEST_LEVEL(irq, cm)) gic_set_irq: Split out the 11MPCore from the generic behavior. For the generic behavior, always GIC_SET_LEVEL() on positive level, but only GIC_SET_PENDING for edge-triggered interrupts and always simply GIC_CLEAR_LEVEL() on negative level. gic_complete_irq: Only resample the line for line-triggered interrupts on an 11MPCore. Generic implementations will sample the line directly in gic_test_pending(). Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08target-arm: Add support for AArch32 64bit VCVTB and VCVTTWill Newton
Add support for the AArch32 floating-point half-precision to double- precision conversion VCVTB and VCVTT instructions. Signed-off-by: Will Newton <will.newton@linaro.org> [PMM: fixed a minor missing-braces style issue] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc groupPeter Maydell
Add the SIMD FNEG and FABS instructions in the SIMD 2-reg-misc group. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Add 2-reg-misc REV* instructionsAlex Bennée
Add the byte-reverse operations REV64, REV32 and REV16 from the two-reg-misc group. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Add narrowing 2-reg-misc instructionsPeter Maydell
Add the narrowing integer instructions in the 2-reg-misc class. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement 2-reg-misc CNT, NOT and RBITPeter Maydell
Implement the 2-reg-misc CNT, NOT and RBIT instructions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement 2-register misc compares, ABS, NEGPeter Maydell
Implement the simple 2-register-misc operations we can share with the scalar-two-register-misc code. (SUQADD, USQADD, SQABS, SQNEG also fall into this category, but aren't implemented in the scalar-2-register case yet either.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Add skeleton decode for SIMD 2-reg misc groupPeter Maydell
Add a skeleton decode for the SIMD 2-reg misc group. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg miscPeter Maydell
Implement the simple 64 bit integer operations from the SIMD scalar 2-register misc group (C3.6.12): the comparisons against zero, plus ABS and NEG. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement remaining integer scalar-3-same insnsPeter Maydell
Implement the remaining integer instructions in the scalar-three-reg-same group: SQADD, UQADD, SQSUB, UQSUB, SQSHL, UQSHL, SQRSHL, UQRSHL, SQDMULH, SQRDMULH. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement scalar pairwise opsPeter Maydell
Implement the instructions in the scalar pairwise group (C3.6.8). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTRPeter Maydell
We have macros for marking TCGv values as unused, checking if they are unused and comparing them to each other. However these only exist for TCGv_i32 and TCGv_i64; add them for TCGv_ptr as well. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMDPeter Maydell
Implement the pairwise integer operations in the 3-reg-same SIMD group: ADDP, SMAXP, SMINP, UMAXP and UMINP. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insnsPeter Maydell
Implement the SIMD 3-reg-same instructions where the size == 3 case is reserved: SHADD, UHADD, SRHADD, URHADD, SHSUB, UHSUB, SMAX, UMAX, SMIN, UMIN, SABD, UABD, SABA, UABA, MLA, MLS, MUL, PMUL, SQRDMULH, SQDMULH. (None of these have scalar-3-same versions.) This completes the non-pairwise integer instructions in this category. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08target-arm: A64: Implement SIMD 3-reg-same shift and saturate insnsPeter Maydell
Implement the SIMD 3-reg-same instructions SQADD, UQADD, SQSUB, UQSUB, SSHL, USHL, SQSHl, UQSHL, SRSHL, URSHL, SQRSHL, UQRSHL; these are all simple calls to existing Neon helpers. We also enable SSHL, USHL, SRSHL and URSHL for the 3-reg-same-scalar category (but not the others because they can have non-size-64 operands and the scalar_3reg_same function doesn't support that yet.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08Merge remote-tracking branch ↵Peter Maydell
'remotes/juanquintela/tags/migration/20140204-1' into staging migration/next for 20140204 # gpg: Signature made Tue 04 Feb 2014 15:52:00 GMT using RSA key ID 5872D723 # gpg: Can't check signature: public key not found * remotes/juanquintela/tags/migration/20140204-1: Don't abort on memory allocation error Don't abort on out of memory when creating page cache XBZRLE cache size should not be larger than guest memory size migration:fix free XBZRLE decoded_buf wrong Add check for cache size smaller than page size Set xbzrle buffers to NULL after freeing them to avoid double free errors exec: fix ram_list dirty map optimization vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-07Merge remote-tracking branch 'remotes/kraxel/tags/pull-roms-1' into stagingPeter Maydell
Update seabios to 1.7.4 # gpg: Signature made Mon 03 Feb 2014 14:42:44 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-roms-1: Update seabios binaries to 1.7.4 Update seabios submodule to 1.7.4 roms: remove explicit MAKEFLAGS from recursive make invocations Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-07Merge remote-tracking branch 'remotes/stefanha/tags/qtest-for-peter' into ↵Peter Maydell
staging qtest resource cleanup patches # gpg: Signature made Tue 04 Feb 2014 08:29:12 GMT using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/qtest-for-peter: qtest: unlink UNIX domain sockets after connecting qtest: unlink QEMU pid file after startup Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-06Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell
* remotes/kvm/uq/master: target-i386: Move KVM default-vendor hack to instance_init target-i386: Don't change x86_def_t struct on cpu_x86_register() target-i386: Eliminate CONFIG_KVM #ifdefs kvm: add support for hyper-v timers kvm: make hyperv vapic assist page migratable kvm: make hyperv hypercall and guest os id MSRs migratable. kvm: make availability of Hyper-V enlightenments dependent on KVM_CAP_HYPERV KVM: fix coexistence of KVM and Hyper-V leaves kvm: print suberror on all internal errors target-i386: kvm_check_features_against_host(): Kill feature word array target-i386: kvm_cpu_fill_host(): Fill feature words in a loop target-i386: kvm_cpu_fill_host(): Set all feature words at end of function target-i386: kvm_cpu_fill_host(): No need to check xlevel2 target-i386: kvm_cpu_fill_host(): No need to check CPU vendor target-i386: kvm_cpu_fill_host(): No need to check level target-i386: kvm_cpu_fill_host(): Kill unused code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-06Merge remote-tracking branch 'remotes/spice/tags/pull-spice-2' into stagingPeter Maydell
misc spice patches # gpg: Signature made Mon 03 Feb 2014 15:05:29 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/spice/tags/pull-spice-2: spice: hook qemu_chr_fe_set_open() event to ports Add the ability to vary Spice playback and record rates, to facilitate Opus support. hw/display/qxl: fix signed to unsigned comparison qxl: clear irq on reset Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-05Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-02-02' ↵Peter Maydell
into staging trivial patches for 2014-02-02 # gpg: Signature made Sun 02 Feb 2014 16:11:37 GMT using RSA key ID 74F0C838 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: E190 8639 3B10 B51B AC2C 8B73 5253 C5AD 74F0 C838 * remotes/mjt/tags/trivial-patches-2014-02-02: tests/.gitignore: Ignore tests/check-qom-interface hw/ppc: Remove unused defines readline: Add missing GCC_FMT_ATTR tcg/s390: Remove sigill_handler i386: Add missing include file for QEMU_PACKED osdep: drop unused #include "trace.h" qemu 1.7.0 does not build on NetBSD Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-05Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell
staging Block pull request # gpg: Signature made Fri 31 Jan 2014 21:16:43 GMT using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: qemu-iotests: only run 071 on qcow2 dataplane: Comment fix block/vhdx: Error checking fixes qemu-iotests: Drop assert_no_active_commit in case 040 block/vmdk: add basic .bdrv_check support block: remove qcow2 .bdrv_make_empty implementation block: remove QED .bdrv_make_empty implementation Describe flaws in qcow/qcow2 encryption in the docs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-04Merge remote-tracking branch 'remotes/borntraeger/tags/kvm-s390-20140131' ↵Peter Maydell
into staging This patch set contains the sclp defines and events for cpu hotplug, the initial sclp defines (without code yet) for standby memory (some sort of memory hotplug) as well as a cleanup of the kvm register synchronization. # gpg: Signature made Fri 31 Jan 2014 08:54:29 GMT using RSA key ID B5A61C7C # gpg: Can't check signature: public key not found * remotes/borntraeger/tags/kvm-s390-20140131: s390x/kvm: cleanup partial register handling sclp-s390: Define new SCLP codes and structures s390-sclp: SCLP Event integration s390-sclp: SCLP CPU Info s390-sclp: Define New SCLP Codes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-04Merge remote-tracking branch 'remotes/mcayland/qemu-openbios' into stagingPeter Maydell
* remotes/mcayland/qemu-openbios: Update OpenBIOS images Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-04Don't abort on memory allocation errorOrit Wasserman
It is better to fail migration in case of failure to allocate new cache item Signed-off-by: Orit Wasserman <owasserm@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04Don't abort on out of memory when creating page cacheOrit Wasserman
Signed-off-by: Orit Wasserman <owasserm@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04XBZRLE cache size should not be larger than guest memory sizeOrit Wasserman
Signed-off-by: Orit Wasserman <owasserm@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04migration:fix free XBZRLE decoded_buf wrongGonglei (Arei)
When qemu do live migration with xbzrle, qemu malloc decoded_buf at destination end but free it at source end. It will crash qemu by double free error in some scenarios. Splitting the XBZRLE structure for clear logic distinguishing src/dst side. Signed-off-by: ChenLiang <chenliang88@huawei.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Orit Wasserman <owasserm@redhat.com> Signed-off-by: GongLei <arei.gonglei@huawei.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04Add check for cache size smaller than page sizeOrit Wasserman
Signed-off-by: Orit Wasserman <owasserm@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04Set xbzrle buffers to NULL after freeing them to avoid double free errorsOrit Wasserman
Signed-off-by: Orit Wasserman <owasserm@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04exec: fix ram_list dirty map optimizationAlexey Kardashevskiy
The ae2810c4bb3b383176e8e1b33931b16c01483aab patch introduced optimization for ram_list.dirty_memory update. However it can only work correctly if hpratio is 1 as the @bitmap parameter stores 1 bits per system page size (may vary, 4K or 64K on PPC64) and ram_list.dirty_memory stores 1 bit per TARGET_PAGE_SIZE (which is hardcoded to 4K). This fixes hpratio!=1 case to fall back to the slow path. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-04vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-typePeter Maydell
The VMSTATE_STRUCT_POINTER macros are a bit odd in that they must be passed an argument "FooType *" rather than just taking the FooType. They're only used in one place, so it's easy to tidy this up. This also lets us use the macro to replace the hand-rolled VMSTATE_PTIMER. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Juan Quintela <quintela@redhat.com>
2014-02-03target-i386: Move KVM default-vendor hack to instance_initEduardo Habkost
As we will not have a cpu_x86_find_by_name() function anymore, move the KVM default-vendor hack to instance_init. Unfortunately we can't move that code to class_init because it depends on KVM being initialized. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03target-i386: Don't change x86_def_t struct on cpu_x86_register()Eduardo Habkost
As eventually the x86_def_t data is going to be provided by the CPU class, it's better to not touch it, and handle the special cases on the X86CPU object itself. Current behavior of the code should stay exactly the same. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03target-i386: Eliminate CONFIG_KVM #ifdefsEduardo Habkost
The compiler is already able to eliminate the kvm_arch_get_supported_cpuid() calls in kvm_cpu_fill_host() and filter_features_for_kvm(), so we can eliminate the CONFIG_KVM #ifdefs there. Also, kvm_cpu_fill_host() and host_cpuid() don't need to check CONFIG_KVM, as they don't have any KVM-specific function calls. Tested to build successfully with CONFIG_KVM disabled, using the following CFLAGS combinations: "-DNDEBUG", "-DNDEBUG -O', "-DNDEBUG -O0", "-DNDEBUG -O1", "-DNDEBUG -O2". Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03kvm: add support for hyper-v timersVadim Rozenfeld
http://msdn.microsoft.com/en-us/library/windows/hardware/ff541625%28v=vs.85%29.aspx This code is generic for activating reference time counter or virtual reference time stamp counter Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03kvm: make hyperv vapic assist page migratableVadim Rozenfeld
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03kvm: make hyperv hypercall and guest os id MSRs migratable.Vadim Rozenfeld
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03kvm: make availability of Hyper-V enlightenments dependent on KVM_CAP_HYPERVPaolo Bonzini
The MS docs specify HV_X64_MSR_HYPERCALL as a mandatory interface, thus we must provide the MSRs even if the user only specified features that, like relaxed timing, in principle don't require them. And the MSRs are only there if the hypervisor has KVM_CAP_HYPERV. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03KVM: fix coexistence of KVM and Hyper-V leavesPaolo Bonzini
kvm_arch_init_vcpu's initialization of the KVM leaves at 0x40000100 is broken, because KVM_CPUID_FEATURES is left at 0x40000001. Move it to 0x40000101 if Hyper-V is enabled. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03kvm: print suberror on all internal errorsRadim Krčmář
KVM introduced internal error exit reason and suberror at the same time, and later extended it with internal error data. QEMU does not report suberror on hosts between these two events because we check for the extension. (half a year in 2009, but it is misleading) Fix by removing KVM_CAP_INTERNAL_ERROR_DATA condition on printf. (partially improved by bb44e0d12df70 and ba4047cf848a3 in the past) Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03target-i386: kvm_check_features_against_host(): Kill feature word arrayEduardo Habkost
We don't need the ft[] array on kvm_check_features_against_host() anymore, as we can simply use the feature_word_info[] array, that has everything we need. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03target-i386: kvm_cpu_fill_host(): Fill feature words in a loopEduardo Habkost
Now that the kvm_cpu_fill_host() code is simplified, we can simply set the feature word array using a simple loop. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03target-i386: kvm_cpu_fill_host(): Set all feature words at end of functionEduardo Habkost
Reorder the code so all the code that sets x86_cpu_def->features is at the end of the function. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-02-03target-i386: kvm_cpu_fill_host(): No need to check xlevel2Eduardo Habkost
There's no need to check CPU xlevel2 before calling kvm_arch_get_supported_cpuid(s, 0xC0000001, 0, R_EDX), because: * The kernel won't return any entry for 0xC0000000 if host CPU vendor is not Centaur (See kvm_dev_ioctl_get_supported_cpuid() on the kernel code) * Similarly, the kernel won't return any entry for 0xC0000001 if CPUID[0xC0000000].EAX is < 0xC0000001 * kvm_arch_get_supported_cpuid() will return 0 if no entry is returned by the kernel for the requested leaf For similar reasons, we can simply set x86_cpu_def->xlevel2 directly instead of making it conditional, because it will be set to 0 CPU vendor is not Centaur. This will simplify the kvm_cpu_fill_host() code a little. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [Remove unparseable comment. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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