aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-10-01Update kernel header script to include vfioAlex Williamson
Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-01x86: Implement SMEP and SMAPH. Peter Anvin
This patch implements Supervisor Mode Execution Prevention (SMEP) and Supervisor Mode Access Prevention (SMAP) for x86. The purpose of the patch, obviously, is to help kernel developers debug the support for those features. A fair bit of the code relates to the handling of CPUID features. The CPUID code probably would get greatly simplified if all the feature bit words were unified into a single vector object, but in the interest of producing a minimal patch for SMEP/SMAP, and because I had very limited time for this project, I followed the existing style. [ v2: don't change the definition of the qemu64 CPU shorthand, since that breaks loading old snapshots. Per Anthony Liguori this can be fixed once the CPU feature set is snapshot. Change the coding style slightly to conform to checkpatch.pl. ] Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-30i386: -cpu help: remove reference to specific CPUID leaves/registersEduardo Habkost
The -cpu configuration interface is based on a list of feature names or properties, on a single namespace, so there's no need to mention on which CPUID leaf/register each flag is located. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-09-30i386: cpu: eliminate duplicate feature namesEduardo Habkost
Instead of having duplicate feature names on the ext2_feature array for the AMD feature bit aliases, we keep the feature names only on the feature_name[] array, and copy the corresponding bits to cpuid_ext2_features in case the CPU vendor is AMD. This will: - Make sure we don't set the feature bit aliases on Intel CPUs; - Make it easier to convert feature bits to CPU properties, as now we have a single bit on the x86_def_t struct for each CPU feature. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-09-30i386: cpu: replace EXT2_FEATURE_MASK with CPUID_EXT2_AMD_ALIASESEduardo Habkost
Both constants have the same value, but CPUID_EXT2_AMD_ALIASES is defined without using magic numbers. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-09-30i386: kvm: use a #define for the set of alias feature bitsEduardo Habkost
Instea of using a hardcoded hex constant, define CPUID_EXT2_AMD_ALIASES as the set of CPUID[8000_0001].EDX bits that on AMD are the same as the bits of CPUID[1].EDX. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-By: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-09-30i386: kvm: bit 10 of CPUID[8000_0001].EDX is reservedEduardo Habkost
Bit 10 of CPUID[8000_0001].EDX is not defined as an alias of CPUID[1].EDX[10], so do not duplicate it on kvm_arch_get_supported_cpuid(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-By: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Don Slutz <Don@CloudSwitch.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-09-27Merge branch 'arm-devs.for-upstream' of ↵Aurelien Jarno
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: Versatile Express: Add modelling of NOR flash Versatile Express: Fix NOR flash 0 address and remove flash alias hw/armv7m_nvic: Correctly register GIC region when setting up NVIC pl190: fix read of VECTADDR
2012-09-27target-s390x: Tidy cpu_dump_stateRichard Henderson
The blank lines inside the single dump make it difficult for the eye to pick out the block. Worse, with interior newlines, but no blank line following, the PSW line appears to belong to the next dump block. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27target-s390x: Avoid double CPU_LOG_TB_CPURichard Henderson
This is already handled generically in cpu_exec. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27target-s390x: Use CPU_LOG_INTRichard Henderson
Three places in the interrupt code did we not honor the mask. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27target-unicore32: Call tcg_gen_debug_insn_startRichard Henderson
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27target-s390x: Call tcg_gen_debug_insn_startRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27target-m68k: Call tcg_gen_debug_insn_startRichard Henderson
Cc: Paul Brook <paul@codesourcery.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-27tci: Fix for AREG0 free modeStefan Weil
Support for helper functions with 5 arguments was missing in the code generator and in the interpreter. There is no need to pass the constant TCG_AREG0 from the code generator to the interpreter. Remove that code for the INDEX_op_qemu_st* opcodes. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26Versatile Express: Add modelling of NOR flashFrancesco Lavra
This patch adds modelling of the two NOR flash banks found on the Versatile Express motherboard. Tested with U-Boot running on an emulated Versatile Express, with either A9 or A15 CoreTile. Signed-off-by: Francesco Lavra <francescolavra.fl@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-09-26Versatile Express: Fix NOR flash 0 address and remove flash aliasFrancesco Lavra
In the A series memory map (implemented in the Cortex A15 CoreTile), the first NOR flash bank (flash 0) is mapped to address 0x08000000, while address 0x00000000 can be configured as alias to either the first or the second flash bank. This patch fixes the definition of flash 0 address, and for simplicity removes the alias definition. Signed-off-by: Francesco Lavra <francescolavra.fl@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-09-26hw/armv7m_nvic: Correctly register GIC region when setting up NVICMeador Inge
When setting up the NVIC memory regions the memory range 0x100..0xcff is aliased to an IO memory region that belongs to the ARM GIC. This aliased region should be added to the NVIC memory container, but the actual GIC IO memory region was being added instead. This mixup was causing the wrong IO memory access functions to be called when accessing parts of the NVIC memory. Signed-off-by: Meador Inge <meadori@codesourcery.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-09-26pl190: fix read of VECTADDRBrendan Fennell
Reading VECTADDR was causing us to set the current priority to the wrong value, the most obvious effect of which was that we would return the vector for the wrong interrupt as the result of the read. Signed-off-by: Brendan Fennell <bfennell@skynet.ie> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-09-25add a boot parameter to set reboot timeoutAmos Kong
Added an option to let qemu transfer a configuration file to bios, "etc/boot-fail-wait", which could be specified by command -boot reboot-timeout=T T have a max value of 0xffff, unit is ms. With this option, guest will wait for a given time if not find bootabled device, then reboot. If reboot-timeout is '-1', guest will not reboot, qemu passes '-1' to bios by default. This feature need the new seabios's support. Seabios pulls the value from the fwcfg "file" interface, this interface is used because SeaBIOS needs a reliable way of obtaining a name, value size, and value. It in no way requires that there be a real file on the user's host machine. Signed-off-by: Amos Kong <akong@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Clear handler only for valid fdOrit Wasserman
Signed-off-by: Orit Wasserman <owasserm@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Fix address handling in inet_nonblocking_connectOrit Wasserman
getaddrinfo can give us a list of addresses, but we only try to connect to the first one. If that fails we never proceed to the next one. This is common on desktop setups that often have ipv6 configured but not actually working. To fix this make inet_connect_nonblocking retry connection with a different address. callers on inet_nonblocking_connect register a callback function that will be called when connect opertion completes, in case of failure the fd will have a negative value Signed-off-by: Orit Wasserman <owasserm@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Separate inet_connect into inet_connect (blocking) and inet_nonblocking_connectOrit Wasserman
No need to add non blocking parameters to the blocking inet_connect add block parameter for inet_connect_opts instead of using QemuOpt "block". Signed-off-by: Orit Wasserman <owasserm@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Refactor inet_connect_opts functionMichael S. Tsirkin
refactor address resolution code to fix nonblocking connect remove getnameinfo call Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Amos Kong <akong@redhat.com> Signed-off-by: Orit Wasserman <owasserm@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25configure: Allow builds without any system or user emulationStefan Weil
The old code aborted configure when no emulation target was selected. Even after removing the 'exit 1', it tried to read from STDIN when QEMU was configured with configure' '--disable-user' '--disable-system' This is fixed here. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25ivshmem: add 64bit optionGerd Hoffmann
This patch adds a "use64" property which will make the ivshmem driver register a 64bit memory bar when set, so you have something to play with when testing 64bit pci bits. It also allows to have quite big shared memory regions, like this: [root@fedora ~]# lspci -vs1:1 01:01.0 RAM memory: Red Hat, Inc Device 1110 Subsystem: Red Hat, Inc Device 1100 Physical Slot: 1-1 Flags: fast devsel Memory at fd400000 (32-bit, non-prefetchable) [disabled] [size=256] Memory at 8040000000 (64-bit, prefetchable) [size=1G] [ v5: rebase, update compat property for post-1.2 merge ] [ v4: rebase & adapt to latest master again ] [ v3: rebase & adapt to latest master ] [ v2: default to on as suggested by avi, turn off for pc-$old using compat property ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Cam Macdonell <cam@cs.ualberta.ca> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25compat: turn off msi/msix on xhci for old machine typesGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25add pc-1.3 machine typeGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Cleanup unused global var qemu_system_powerdownIgor Mammedov
All deps that used global qemu_system_powerdown var are now converted to notifiers, so remove it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25target-sparc: use notifier for signaling guest system_powerdown commandIgor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25target-arm: use notifier for signaling guest system_powerdown commandIgor Mammedov
Acked-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25acpi: use notifier for signaling guest system_powerdown commandIgor Mammedov
In addition, there is no need to allocate an extra irq just for rising SCI in irq handler. Just rise SCI right from notifier handler instead. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Introduce powerdown_notifiersIgor Mammedov
Notifier will be used for signaling powerdown request to guest in a more general way and intended to replace very specific qemu_irq_rise(qemu_system_powerdown) and will allow to remove global variable qemu_system_powerdown. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-25Merge remote-tracking branch 'origin/master' into stagingAnthony Liguori
* origin/master: tcg/i386: fix build with -march < i686 tcg: Streamline movcond_i64 using movcond_i32 tcg: Streamline movcond_i64 using 32-bit arithmetic tcg: Sanity check goto_tb input tcg: Sanity check deposit inputs tcg: Add tcg_debug_assert tcg: Implement concat*_i64 with deposit_i64 tcg: Emit XORI as NOT for appropriate constants tcg: Optimize initial inputs for ori_i64 tcg: Emit ANDI as EXTU for appropriate constants tcg: Adjust descriptions of *cond opcodes tcg/mips: fix MIPS32(R2) detection
2012-09-26tcg/i386: fix build with -march < i686Aurelien Jarno
The movcond_i32 op has to be protected with TCG_TARGET_HAS_movcond_i32 to fix the build with -march < i686. Thanks to Richard Henderson for the hint. Reported-by: Alex Barcelo <abarcelo@ac.upc.edu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Streamline movcond_i64 using movcond_i32Richard Henderson
When movcond_i32 is available we can further reduce the generated op count from 12 to 6, and the generated code size on i686 from 88 to 74 bytes. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Streamline movcond_i64 using 32-bit arithmeticRichard Henderson
Avoiding 64-bit arithmetic (outside of the compare) reduces the generated op count from 15 to 12, and the generated code size on i686 from 105 to 88 bytes. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Sanity check goto_tb inputRichard Henderson
Checking that we don't try for idx != [01] is trivial. Checking that we don't issue more than one of any index requires a tad more data and some ifdefs protecting that new variable. Signed-off-by: Richard Henderson <rth@twiddle.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Sanity check deposit inputsRichard Henderson
Given these are constants, checking once here means everything after can assume they're correct. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Add tcg_debug_assertRichard Henderson
Like the C assert macro, except only enabled for CONFIG_DEBUG_TCG, and without having to set _NDEBUG and disable all other asserts at the same time. The use of __builtin_unreachable (when available) gives the compiler the same information, which may (or may not) help it optimize better. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Implement concat*_i64 with deposit_i64Richard Henderson
For tcg_gen_concat_i32_i64 we only use deposit if the host supports it. For tcg_gen_concat32_i64 even if the host does not, as we get identical code before and after. Note that this relies on the ANDI -> EXTU patch for the identity claim. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Emit XORI as NOT for appropriate constantsRichard Henderson
Note that xori_i64 failed to perform even the minimal optimizations promised by the README. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Optimize initial inputs for ori_i64Richard Henderson
Copy the same optimizations from ori_i32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Emit ANDI as EXTU for appropriate constantsRichard Henderson
Note that andi_i64 failed to perform even the minimal optimizations promised by the README. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg: Adjust descriptions of *cond opcodesRichard Henderson
The README file documented the operand ordering of the tcg_gen_* functions. Since we're documenting opcodes here, use the true operand ordering. Signed-off-by: Richard Henderson <rth@twiddle.net> Cc: malc <av1474@comtv.ru> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-26tcg/mips: fix MIPS32(R2) detectionAurelien Jarno
Fix the MIPS32(R2) cpu detection so that it also works with -march=octeon. Thanks to Andrew Pinski for the hint. Cc: Andrew Pinski <apinski@cavium.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-25Merge remote-tracking branch 'kwolf/for-anthony' into stagingAnthony Liguori
* kwolf/for-anthony: block: remove keep_read_only flag from BlockDriverState struct block: convert bdrv_commit() to use bdrv_reopen() block: vpc image file reopen block: vdi image file reopen block: vmdk image file reopen block: qcow image file reopen block: qcow2 image file reopen block: qed image file reopen block: raw image file reopen block: raw-posix image file reopen block: purge s->aligned_buf and s->aligned_buf_size from raw-posix.c block: use BDRV_O_NOCACHE instead of s->aligned_buf in raw-posix.c block: do not parse BDRV_O_CACHE_WB in block drivers block: move open flag parsing in raw block drivers to helper functions block: move aio initialization into a helper function block: Framework for reopening files safely block: make bdrv_set_enable_write_cache() modify open_flags block: correctly set the keep_read_only flag blockdev: preserve readonly and snapshot states across media changes
2012-09-25Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori
* stefanha/trivial-patches: w32: Always use standard instead of native format strings net/socket: Fix compiler warning (regression for MinGW) linux-user: Remove redundant null check and replace free by g_free qemu-timer: simplify qemu_run_timers TextConsole: saturate escape parameter in TTY_STATE_CSI curses: don't initialize curses when qemu is daemonized dtrace backend: add function to reserved words pflash_cfi01: Fix warning caused by unreachable code ioh3420: Remove unreachable code lm4549: Fix buffer overflow cadence_uart: Fix buffer overflow qemu-sockets: Fix potential memory leak qemu-ga: Remove unreachable code after g_error target-i386: Allow tsc-frequency to be larger then 2.147G
2012-09-25Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori
* afaerber/qom-cpu: target-alpha: Initialize env->cpu_model_str target-i386: Drop unused setscalar() macro target-i386: Kill cpudef config section support target-i386: x86_cpudef_setup() coding style change Eliminate cpus-x86_64.conf file target-i386: Move CPU models from cpus-x86_64.conf to C target-i386: Add missing CPUID_* constants Drop cpu_list_id macro target-i386: Fold -cpu ?cpuid, ?model output into -cpu help, drop ?dump MAINTAINERS: Add entry for QOM CPU
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-14 12:30:50 +0000