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2023-11-28Merge tag 'misc-next-20231128' of https://github.com/philmd/qemu into stagingStefan Hajnoczi
Misc fixes for 8.2 * buildsys: Invoke bash via 'env' (Samuel) * doc: Fix example in s390-cpu-topology.rst (Zhao) * HW: Fix AVR ATMega reset stack (Gihun) and VT82C686 IRQ routing (Zoltan) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVl7MUACgkQ4+MsLN6t # wN4nsQ//U7/GGrMaNJF369pC0UfC0dfD39RoD9jmmrWUQB17baMvXo+BMBcELX0Q # BtgRjIYwnywnVZlB11JL5Ql9ykSRqd7VeqnZfH//GqQO+ySF7jl6ekNT6YNjUbWu # iF9bU3o0/LAVl/3pe9LQ4q/yOjzERA5o4JKYviHZYcWE811/5lBNgER4iPyCz6a8 # aGI3S5PGmq6a9x5266jkY2WWldDy7D1ujkuvxxc4tgnmbBjL21soJ/oRLOBjGTNl # hCRfDTEiFZm7OxjV7oB03Nr3EGGStGdy0aPhhtFwzZxQ9yV7d2DLsbYGgwzZYkKQ # 9v4DtGqYyvDA7LBmfxOrnzL0WXgN4xO3qekLqHDtChDzFFEYwtHvH0duPUiQv1Yu # qHyOsfB58rKzWHeo0ACEjMWGdD1opCXCeoJlEf/saiQ5EgyBwph/z2mWYN4yak5H # Zu3xF15BcnyavC6sVeuE+rT574dhCzOtH8Vf3WVwqfL5D5cyCjHlmPSAXXMqBkmh # BMOD8O210n6IdzuuOQ038t3yGvIc0YysOmQgfLjRYlZa884q3wExgrufH+NYbGMj # bFthPjLKgHm+q4k2mH65G98xwXQFT6rdHanw2iEJcPJbhhk9SNWYgaQ0r0Oi2Pfd # zCQ22F1j9UqGcqKh+8tzAfjayRyQUJtgizPXEWanADkpIDYxrRk= # =323/ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 28 Nov 2023 08:36:05 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-next-20231128' of https://github.com/philmd/qemu: docs/s390: Fix wrong command example in s390-cpu-topology.rst hw/avr/atmega: Fix wrong initial value of stack pointer hw/audio/via-ac97: Route interrupts using via_isa_set_irq() hw/isa/vt82c686: Route PIRQ inputs using via_isa_set_irq() hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts hw/isa/vt82c686: Bring back via_isa_set_irq() target/hexagon/idef-parser/prepare: use env to invoke bash Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-28Merge tag 'pull-target-arm-20231127' of ↵Stefan Hajnoczi
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Set IL bit for pauth, SVE access, BTI trap syndromes * Handle overflow in calculation of next timer tick * hw/net/can/xlnx-zynqmp: Avoid underflow when popping FIFOs * Various devices: Free array property memory on device finalize * hw/ssi/xilinx_spips: fix an out of bound access * hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models * hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMA # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmVkzLAZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3o79D/0Yh7Q7N4+fc4xdBK5hb1GN # 31rBWZ3z0XzBzXrN80g6ig5i+CvTq7+120yx4Kl5bdyAMGdXpryTeNSoa4ewmNtC # +c6pqV8IUIHA3axepuHtwjs4wRzWoFz13gy+X/1spfhcrtFpWyRt0f3cc1fElhzX # 2K/4H9TD2d5yZBvaKLoJ6GzdK2wtWfucvWQDOUigRF7rvSST3awZ6gkumm+/6EM5 # vbIVOqi+0JcnWKJj0i4S1vRUPg0+CuaZN8glXcGkq2BaMfOohpjFGTMY0KsAK1Cv # Ow1guxxy2mcLixQ8pX7ii5WHVDCuPqTVcwHUQJqN5Ln6CFEre38jM1ZwgHpWhb8G # CoVOu2B96QwPoICD7QomaKCJYHkAczC4KETsTz/Mc+zcU6+cQiv0swc2sDhwBlmT # weHQAmZg5dPRl3DQ/8F3llhdYyvOGnUpaaBauJiuH2I5n/qhqbvcgu9G7pGwd2gm # lk8LuzjbVEtBu2jFlPCMpvuSuJJciR/3/QdHMGlN6L0ooY6dFL9puW51wFKSh+Kx # JqetuUJXVWLTiL9ekLnNPQkuQQwP3WQsIvQO8tjEiuojw1utk/50JPmXg/xHEahx # rN8aiLstR4olh1i+CrIee3QR6IwhqZmvEVHROIw0ExJ1L04FCCtPlvJ/G2gD1ta2 # oLvqWLlc752+nND72lIJZg== # =X700 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 27 Nov 2023 12:06:56 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20231127' of https://git.linaro.org/people/pmaydell/qemu-arm: hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMA hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models hw/ssi/xilinx_spips: fix an out of bound access hw/input/stellaris_gamepad: Free StellarisGamepad::keycodes[] array hw/nvram/xlnx-efuse-ctrl: Free XlnxVersalEFuseCtrl[] "pg0-lock" array hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on finalize() hw/misc/mps2-scc: Free MPS2SCC::oscclk[] array on finalize() hw/virtio: Free VirtIOIOMMUPCI::vdev.reserved_regions[] on finalize() hw/virtio: Add VirtioPCIDeviceTypeInfo::instance_finalize field hw/net/can/xlnx-zynqmp: Avoid underflow while popping RX FIFO hw/net/can/xlnx-zynqmp: Avoid underflow while popping TX FIFOs target/arm: Handle overflow in calculation of next timer tick target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-28Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into stagingStefan Hajnoczi
Block layer patches - ide/via: Fix BAR4 value in legacy mode - export/vhost-user-blk: Fix consecutive drains - vmdk: Don't corrupt desc file in vmdk_write_cid - iotests: fix default machine type detection # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmVl9GARHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9Y9KRAAx3ryUIdaVZX5RZbVC4ZmkgGIpSv+8dS+ # e98H+accyyVTVXlMNYWy0s7tP6sxhhlmGqfGLx/hDynvjJRxyS8VSOXXNIqYcHqN # wGXcgLEgb+qxu7+Y8g3UhMeSmDyRhanOE/MxhMqGOKd/5nxfY1XdD7nkRwCsPAAi # Tud/Jd7t0CSV0wUDfvMtBsQZCBSQyoSu3S3TjZ8I2CPjBaoYojj3XM+LKrlJu+B5 # zwgB5IURac1dOfsjYsX0M0zXxr6pTVNtkdNNwFoiNP+omoRjCXV3W9iTtyU+/zc3 # cnVzQQRE6XufQ/Q7IWHNE3/U5LvM3m+sjB+YryrMTRVItjpGUCgYGsrgodjZp7aj # 4hmwxyZ8PN3+o96d5RWqhRXnY9fy5hzJZOhUMQV6lV/Z14wt8YYsJoqgi4wryoYf # 7VdyZP2Szt2Sgl4+n0uSfPBoR+qMEwni1AxO8iK9OZbpewv7aBO3In4tOAvP/eB8 # VAoCZOfrILSXaR5aorlAPr6IOXanPvgOotmzNs0NaaqYnpfYr6KAH9FjyAm3DZqp # b+/Ep+hrekq9XqnZGMblQsjlTFAc9mRWtqsHUrftl9FhRvSah4R+TyKov8lD23VZ # bvw1etcc0p55Ws4RkUkGn8G5kRyhec3nkHdr4MODCR0s0uo0cBaITnoV0Ra9p7of # K78WSodwZKQ= # =ktlF # -----END PGP SIGNATURE----- # gpg: Signature made Tue 28 Nov 2023 09:08:32 EST # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://repo.or.cz/qemu/kevin: ide/via: Fix BAR4 value in legacy mode export/vhost-user-blk: Fix consecutive drains vmdk: Don't corrupt desc file in vmdk_write_cid iotests: fix default machine type detection Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-28ide/via: Fix BAR4 value in legacy modeBALATON Zoltan
Return default value in legacy mode for BAR4 when unset. This can't be set in reset method because BARs are cleared on reset so we return it instead when BARs are read in legacy mode. This fixes UDMA on amigaone with AmigaOS. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20231125140135.AF6A075A4C3@zero.eik.bme.hu> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-28export/vhost-user-blk: Fix consecutive drainsKevin Wolf
The vhost-user-blk export implement AioContext switches in its drain implementation. This means that on drain_begin, it detaches the server from its AioContext and on drain_end, attaches it again and schedules the server->co_trip coroutine in the updated AioContext. However, nothing guarantees that server->co_trip is even safe to be scheduled. Not only is it unclear that the coroutine is actually in a state where it can be reentered externally without causing problems, but with two consecutive drains, it is possible that the scheduled coroutine didn't have a chance yet to run and trying to schedule an already scheduled coroutine a second time crashes with an assertion failure. Following the model of NBD, this commit makes the vhost-user-blk export shut down server->co_trip during drain so that resuming the export means creating and scheduling a new coroutine, which is always safe. There is one exception: If the drain call didn't poll (for example, this happens in the context of bdrv_graph_wrlock()), then the coroutine didn't have a chance to shut down. However, in this case the AioContext can't have changed; changing the AioContext always involves a polling drain. So in this case we can simply assert that the AioContext is unchanged and just leave the coroutine running or wake it up if it has yielded to wait for the AioContext to be attached again. Fixes: e1054cd4aad03a493a5d1cded7508f7c348205bf Fixes: https://issues.redhat.com/browse/RHEL-1708 Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-ID: <20231127115755.22846-1-kwolf@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-28vmdk: Don't corrupt desc file in vmdk_write_cidFam Zheng
If the text description file is larger than DESC_SIZE, we force the last byte in the buffer to be 0 and write it out. This results in a corruption. Try to allocate a big buffer in this case. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1923 Signed-off-by: Fam Zheng <fam@euphon.net> Message-ID: <20231124115654.3239137-1-fam@euphon.net> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-28iotests: fix default machine type detectionAndrey Drobyshev
The machine type is being detected based on "-M help" output, and we're searching for the line ending with " (default)". However, in downstream one of the machine types s marked as deprecated might become the default, in which case this logic breaks as the line would now end with " (default) (deprecated)". To fix potential issues here, let's relax that requirement and detect the mere presence of " (default)" line instead. Signed-off-by: Andrey Drobyshev <andrey.drobyshev@virtuozzo.com> Message-ID: <20231122121538.32903-1-andrey.drobyshev@virtuozzo.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-28Merge tag 'firmware/seabios-20231128-pull-request' of ↵Stefan Hajnoczi
https://gitlab.com/kraxel/qemu into staging seabios: update to 1.16.3 release This adds one bugfix compared to the snapshot merged during the 8.2 devel cycle. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmVloe0ACgkQTLbY7tPo # cThCmA/9HciX9GJdVKhphS9hxA8ZtqmvB5SCZPEW0wBqpe2/nr6Jb2X7h3oL9h+i # +pzdv0ZygO+Xxzt1thADO1ZFcF4C5l2j4wOrqrvNoTqtgmBgZBAnw/YkjdK+phjU # ETaCgl0TsxHqe9XGpVjgTSB4VGgKmj+80DI2xCBUJPyAvOg9fgcvwpRojX8V+vVS # DG3QM1g2lGlIHMLcYZBM95VNIyPdPED+tCagcw765s0EBT7/Di8yplQqYuosw3Cl # pOKD7cgtDv/Ca0GeNMJlttM1ZrdPutDnapHeUlDax1Tf5c2FBWnBIe2nTyDHHIjC # sMQ1DxRT6tI94L/jp+gYfsO02ILRcOZ2+rfUt/wy1fsPqPrIlD1r3HdBdSkdBLRE # XLw6+5bijPKvyhkHM8fb2qt56ap2JLJ6EgkOHHekpGznEAkYB+sjeTlxiOzNxaDX # C14SdiYgLmpfobxoNvvwRz4L0TTc4mSVIYhSxrGL0Qs1jucUK0+PpoGcacBXcAg8 # ScNwE3V+nUzjh9fGjqaCB6qcAuv4wijvnQAKmDatAkUeYcGMR9PKHHM1AL/JBchC # DEQRa0VaNCkmy1Gcd1Hs5Wf98fqWot7O2j5zbzMm8lN+w6muPA4j7yguqRHZYcnA # Xoor6vDxE9Zt67CLBhuN6Qgv8Ewy4DsJF+w9nVQXVI80Jk973gI= # =ZbmR # -----END PGP SIGNATURE----- # gpg: Signature made Tue 28 Nov 2023 03:16:45 EST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * tag 'firmware/seabios-20231128-pull-request' of https://gitlab.com/kraxel/qemu: seabios: update binaries to 1.16.3 release seabios: update submodule to 1.16.3 release Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-28docs/s390: Fix wrong command example in s390-cpu-topology.rstZhao Liu
From s390_possible_cpu_arch_ids() in hw/s390x/s390-virtio-ccw.c, the "core-id" is the index of possible_cpus->cpus[], so it should only be less than possible_cpus->len, which is equal to ms->smp.max_cpus. Fix the wrong "core-id" 112, because it isn't less than maxcpus (36) in -smp, and the valid core ids are 0-35 inclusive. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231127134917.568552-1-zhao1.liu@linux.intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28hw/avr/atmega: Fix wrong initial value of stack pointerGihun Nam
The current implementation initializes the stack pointer of AVR devices to 0. Although older AVR devices used to be like that, newer ones set it to RAMEND. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1525 Signed-off-by: Gihun Nam <gihun.nam@outlook.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <PH0P222MB0010877445B594724D40C924DEBDA@PH0P222MB0010.NAMP222.PROD.OUTLOOK.COM> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28hw/audio/via-ac97: Route interrupts using via_isa_set_irq()BALATON Zoltan
This device is a function of VIA south bridge and should allow setting interrupt routing within that chip. This is implemented in via_isa_set_irq(). Fixes: eb604411a78b82c468e2b8d81a9401eb8b9c7658 Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <5329840e4be6dd8ae143d07cbfe61d8d2d106654.1701035944.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28hw/isa/vt82c686: Route PIRQ inputs using via_isa_set_irq()BALATON Zoltan
The chip has 4 pins (called PIRQA-D in VT82C686B and PINTA-D in VT8231) that are meant to be connected to PCI IRQ lines and allow routing PCI interrupts to the ISA PIC. Route these in via_isa_set_irq() to make it possible to share them with internal functions that can also be routed to the same ISA IRQs. Fixes: 2fdadd02e675caca4aba4ae26317701fe2c4c901 Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <8c4513d8b78fac40e6d4e65a0a4b3a7f2f278a4b.1701035944.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interruptsBALATON Zoltan
This device is part of a superio/ISA bridge chip and IRQs from it are routed to an ISA interrupt. Use via_isa_set_irq() function to implement this in a vt82c686-uhci-pci specific irq handler. This reverts commit 422a6e8075752bc5342afd3eace23a4990dd7d98. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <ed5cdeaba7cf01eebdaa35f84c63427f4d8876b1.1701035944.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28hw/isa/vt82c686: Bring back via_isa_set_irq()BALATON Zoltan
The VIA integrated south bridge chips combine several functions and allow routing their interrupts to any of the ISA IRQs also allowing multiple sources to share the same ISA IRQ. E.g. pegasos2 firmware configures everything to use IRQ 9 but amigaone routes them to separate ISA IRQs so the current simplified routing does not work. Bring back via_isa_set_irq() and change it to take the component that wants to change an IRQ and keep track of interrupt status of each source separately and do the mapping to ISA IRQ within the ISA bridge. This may not handle cases when an ISA IRQ is controlled by devices directly, not going through via_isa_set_irq() such as serial, parallel or keyboard but these IRQs being conventionally fixed are not likely to be change by guests or share with other devices so this does not cause a problem in practice. This reverts commit 4e5a20b6da9b1f6d2e9621ed7eb8b239560104ae. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <1c3902d4166234bef0a476026441eaac3dd6cda5.1701035944.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28target/hexagon/idef-parser/prepare: use env to invoke bashSamuel Tardieu
This file is the only one involved in the compilation process which still uses the /bin/bash path. Signed-off-by: Samuel Tardieu <sam@rfc1149.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-ID: <20231123211506.636533-1-sam@rfc1149.net> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-28string-output-visitor: Support lists for non-integer typesKevin Wolf
With the introduction of list-based array properties in qdev, the string output visitor has to deal with lists of non-integer elements now ('info qtree' prints all properties with the string output visitor). Currently there is no explicit support for such lists, and the resulting output is only the last element because string_output_set() always replaces the output with the latest value. Instead of replacing the old value, append comma separated values in list context. The difference can be observed in 'info qtree' with a 'rocker' device that has a 'ports' list with more than one element. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-ID: <20231121173416.346610-3-kwolf@redhat.com>
2023-11-28qdev: Fix crash in array property getterKevin Wolf
Passing an uninitialised list to visit_start_list() happens to work for the QObject output visitor because it treats the pointer as an opaque value and never dereferences it, but the string output visitor expects a valid list to check if it has more than one element. The existing code crashes with the string output visitor if the uninitialised value is non-NULL. Passing an explicit NULL would fix the crash, but still result in wrong output. Rework get_prop_array() so that it conforms to the expectations that the string output visitor has. This includes building a real list first and using visit_next_list() to iterate it. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1993 Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Tested-by: Dan Hoffman <dhoff749@gmail.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-ID: <20231121173416.346610-2-kwolf@redhat.com>
2023-11-28seabios: update binaries to 1.16.3 releaseGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-11-28seabios: update submodule to 1.16.3 releaseGerd Hoffmann
git shortlog 1e1da7a96300..rel-1.16.3 ------------------------------------- Gerd Hoffmann (1): limit address space used for pci devices. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-11-27hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMAFrederic Konrad
UG1087 states for the source channel that: if SIZE is programmed to 0, and the DMA is started, the interrupts DONE and MEM_DONE will be asserted. This implies that it is allowed for the guest to stop the source DMA by writing a size of 0 to the SIZE register, so remove the LOG_GUEST_ERROR in that case. While at it remove the comment marking the SIZE register as write-only. See: https://docs.xilinx.com/r/en-US/ug1087-zynq-ultrascale-registers/CSUDMA_SRC_SIZE-CSUDMA-Register Signed-off-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20231124143505.1493184-4-fkonrad@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx modelsFrederic Konrad
It seems that the url changed a bit, and it triggers an error. Fix the URLs so the documentation can be reached again. Signed-off-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20231124143505.1493184-3-fkonrad@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/ssi/xilinx_spips: fix an out of bound accessFrederic Konrad
The spips, qspips, and zynqmp-qspips share the same realize function (xilinx_spips_realize) and initialize their io memory region with different mmio_ops passed through the class. The size of the memory region is set to the largest area (0x200 bytes for zynqmp-qspips) thus it is possible to write out of s->regs[addr] in xilinx_spips_write for spips and qspips. This fixes that wrong behavior. Reviewed-by: Luc Michel <luc.michel@amd.com> Signed-off-by: Frederic Konrad <fkonrad@amd.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Message-id: 20231124143505.1493184-2-fkonrad@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/input/stellaris_gamepad: Free StellarisGamepad::keycodes[] arrayPhilippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit a75f336b97 added: DEFINE_PROP_ARRAY("keycodes", StellarisGamepad, num_buttons, keycodes, qdev_prop_uint32, uint32_t), but forgot to free the 'keycodes' array. Do it in the instance_finalize handler. Fixes: a75f336b97 ("hw/input/stellaris_input: Convert to qdev") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-7-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/nvram/xlnx-efuse-ctrl: Free XlnxVersalEFuseCtrl[] "pg0-lock" arrayPhilippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 9e4aa1fafe added: DEFINE_PROP_ARRAY("pg0-lock", XlnxVersalEFuseCtrl, extra_pg0_lock_n16, extra_pg0_lock_spec, qdev_prop_uint16, uint16_t), but forgot to free the 'extra_pg0_lock_spec' array. Do it in the instance_finalize() handler. Cc: qemu-stable@nongnu.org Fixes: 9e4aa1fafe ("hw/nvram: Xilinx Versal eFuse device") # v6.2.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-6-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on finalize()Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 68fbcc344e added: DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits, qdev_prop_uint32, uint32_t), but forgot to free the 'ro_bits' array. Do it in the instance_finalize handler. Cc: qemu-stable@nongnu.org Fixes: 68fbcc344e ("hw/nvram: Introduce Xilinx eFuse QOM") # v6.2.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-5-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/misc/mps2-scc: Free MPS2SCC::oscclk[] array on finalize()Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 4fb013afcc added: DEFINE_PROP_ARRAY("oscclk", MPS2SCC, num_oscclk, oscclk_reset, qdev_prop_uint32, uint32_t), but forgot to free the 'oscclk_reset' array. Do it in the instance_finalize() handler. Cc: qemu-stable@nongnu.org Fixes: 4fb013afcc ("hw/misc/mps2-scc: Support configurable number of OSCCLK values") # v6.0.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-4-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/virtio: Free VirtIOIOMMUPCI::vdev.reserved_regions[] on finalize()Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties") added the DEFINE_PROP_ARRAY() macro with the following comment: * It is the responsibility of the device deinit code to free the * @_arrayfield memory. Commit 8077b8e549 added: DEFINE_PROP_ARRAY("reserved-regions", VirtIOIOMMUPCI, vdev.nb_reserved_regions, vdev.reserved_regions, qdev_prop_reserved_region, ReservedRegion), but forgot to free the 'vdev.reserved_regions' array. Do it in the instance_finalize() handler. Cc: qemu-stable@nongnu.org Fixes: 8077b8e549 ("virtio-iommu-pci: Add array of Interval properties") # v5.1.0+ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20231121174051.63038-3-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/virtio: Add VirtioPCIDeviceTypeInfo::instance_finalize fieldPhilippe Mathieu-Daudé
The VirtioPCIDeviceTypeInfo structure, added in commit a4ee4c8baa ("virtio: Helper for registering virtio device types") got extended in commit 8ea90ee690 ("virtio: add class_size") with the @class_size field. Do similarly with the @instance_finalize field. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231121174051.63038-2-philmd@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/net/can/xlnx-zynqmp: Avoid underflow while popping RX FIFOPhilippe Mathieu-Daudé
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format Message Format The same message format is used for RXFIFO, TXFIFO, and TXHPB. Each message includes four words (16 bytes). Software must read and write all four words regardless of the actual number of data bytes and valid fields in the message. There is no mention in this reference manual about what the hardware does when not all four words are read. To fix the reported underflow behavior, I choose to fill the 4 frame data registers when the first register (ID) is accessed, which is how I expect hardware would do. Reported-by: Qiang Liu <cyruscyliu@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Message-id: 20231124183325.95392-3-philmd@linaro.org Fixes: 98e5d7a2b7 ("hw/net/can: Introduce Xilinx ZynqMP CAN controller") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1427 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27hw/net/can/xlnx-zynqmp: Avoid underflow while popping TX FIFOsPhilippe Mathieu-Daudé
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format Message Format The same message format is used for RXFIFO, TXFIFO, and TXHPB. Each message includes four words (16 bytes). Software must read and write all four words regardless of the actual number of data bytes and valid fields in the message. There is no mention in this reference manual about what the hardware does when not all four words are written. To fix the reported underflow behavior when DATA2 register is written, I choose to fill the data with the previous content of the ID / DLC / DATA1 registers, which is how I expect hardware would do. Note there is no hardware flag raised under such condition. Reported-by: Qiang Liu <cyruscyliu@gmail.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231124183325.95392-2-philmd@linaro.org Fixes: 98e5d7a2b7 ("hw/net/can: Introduce Xilinx ZynqMP CAN controller") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1425 Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27target/arm: Handle overflow in calculation of next timer tickPeter Maydell
In commit edac4d8a168 back in 2015 when we added support for the virtual timer offset CNTVOFF_EL2, we didn't correctly update the timer-recalculation code that figures out when the timer interrupt is next going to change state. We got it wrong in two ways: * for the 0->1 transition, we didn't notice that gt->cval + offset can overflow a uint64_t * for the 1->0 transition, we didn't notice that the transition might now happen before the count rolls over, if offset > count In the former case, we end up trying to set the next interrupt for a time in the past, which results in QEMU hanging as the timer fires continuously. In the latter case, we would fail to update the interrupt status when we are supposed to. Fix the calculations in both cases. The test case is Alex Bennée's from the bug report, and tests the 0->1 transition overflow case. Fixes: edac4d8a168 ("target-arm: Add CNTVOFF_EL2") Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/60 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120173506.3729884-1-peter.maydell@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27target/arm: Set IL bit for pauth, SVE access, BTI trap syndromesPeter Maydell
The syndrome register value always has an IL field at bit 25, which is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32 bit instruction (or for exceptions which aren't traps on a known instruction, like PC alignment faults). This means that our syn_*() functions should always either take an is_16bit argument to determine whether to set the IL bit, or else unconditionally set it. We missed setting the IL bit for the syndrome for three kinds of trap: * an SVE access exception * a pointer authentication check failure * a BTI (branch target identification) check failure All of these traps are AArch64 only, and so the instruction causing the trap is always 64 bit. This means we can unconditionally set the IL bit in the syn_*() function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231120150121.3458408-1-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2023-11-27Merge tag 'qga-pull-2023-11-25' of https://github.com/kostyanf14/qemu into ↵Stefan Hajnoczi
staging qga-pull-2023-11-25 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEwsLBCepDxjwUI+uE711egWG6hOcFAmViLdsACgkQ711egWG6 # hOfKIQ//fLIycqEGGLqaORaO04lSOUHU5plSHTU6ACQxILZnMas7CDgfEc2ReCor # iyGCUBmNJ0NiSMRZIKys+0gWh/jgCW613KlOKTvGsn1WOgzXId5TOZSx4P7vfw2o # t7gizx02KdaTnOe3VeTCxBRUrCl1skNw487lek++5L7lKD6a4rstND8T4I2fnWyB # 4Y0gWdIyouWMA2xxkQffxD4ycvHxGeEosp//e6KPB3dk7lM4AAh5CrX/WshItXhp # dL1oykgBDfRCFP42exOs5PrB4fIrYbP58qEzP+9QZpysqsa3OX0AJZw3Wgd1sbHJ # 40II+dQTZFN27NTEeZGw1dg38q0bTNvj2dHvv+w3CHjB8Er2Wfm0ERmSWurQGYf5 # uYqNeHfDVg2m6gi4Nzav679NtWlYLhDBN1pok+K8U/im9UK2M9Jk5XieKvOiE8qX # OVBNMC0ty4Utq6KXZUTjbxQcj5/x50OovN+5CP55OAJBwOCk6Er9j5t9RNuKDLY9 # tkllpjZ6d4KI6uwu1zL4znjNGZvNd7eQNagerv5GNpR5mJZqjv/3snpALUqPHjDA # GKBAXwGUXeMCyFR4Gi5NjX5czgDaK4naGrq8GN6T47q2CwUMvowXRX3nwpw0Q38W # BwRjaFEg6mCNy6Vlfj6gIvVF/3PqJh3Iq4rL26I9EMqri0LZW0o= # =RETE # -----END PGP SIGNATURE----- # gpg: Signature made Sat 25 Nov 2023 12:24:43 EST # gpg: using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7 # gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign) <kkostiuk@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: C2C2 C109 EA43 C63C 1423 EB84 EF5D 5E81 61BA 84E7 * tag 'qga-pull-2023-11-25' of https://github.com/kostyanf14/qemu: build-sys: fix meson project version usage Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-27Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi
* document what configure does with virtual environments * bump known good meson version to v1.2.3 * upgrade macOS to 13 (Ventura) and Add manual testing of macOS 14 (Sonoma) * use simple assertions instead of Coverity models * miscellaneous fixes * adjust URL to Coverity tools # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmVgv78UHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroPTmgf/VgDEIRP0teMsz1qAPWyH3eanoF8w # XN9gN0jYUqv1pYVdBws3qxsZFr0GCUrEhF46wbDBj5BgNYjiO6Cg7la1Ryyry7sV # GmwgAQhaCelY7USS4tGeK2A/EpEx4M/pOKfzJhAyjm9d87bdOBoankeYjCR0XZqD # O9CypjA9mxx6Gi28RC1OjIIPxERgazpDMmm1gntEI29qoYiKvD7uOjA3EP7zrBhz # 6Qi1/cx5WgvhePnFAab25jQDgkFaPViZSV28UdfH/29+bUkcJhyki56+vIoLbEtK # 18+wVQkOFl10Ibo7cmQ4JnT8q7BaqhXbO54xmT3LKzMi1I8RCOpOiFFGjg== # =+YGq # -----END PGP SIGNATURE----- # gpg: Signature made Fri 24 Nov 2023 10:22:39 EST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: scripts: adjust url to Coverity tools configure: Make only once with pseudo-"in source tree" builds system: Use &error_abort in memory_region_init_ram_[device_]ptr() disas/cris: Pass buffer size to format_dec() to avoid overflow warning audio: Free consumed default audio devices .gitlab-ci.d/cirrus: Add manual testing of macOS 14 (Sonoma) buildsys: Bump known good meson version to v1.2.3 docs: document what configure does with virtual environments tests: respect --enable/--disable-download for Avocado coverity: physmem: use simple assertions instead of modelling Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-25build-sys: fix meson project version usageMarc-André Lureau
Program wixl found: YES (/usr/bin/wixl) ../qga/meson.build:149:16: ERROR: Unknown variable "project". Fixes: e20d68aa0b9 ("configure, meson: use command line options to configure qemu-ga") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
2023-11-24scripts: adjust url to Coverity toolsPaolo Bonzini
The URL to the Coverity tools download has changed; the old one points to an obsolete version that is not supported anymore. Adjust to point to the correct and supported tools. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24configure: Make only once with pseudo-"in source tree" buildsAkihiko Odaki
Pseudo-"in source tree" build used to run make in the build directory as many times as goals. Worse, although .NOTPARALLEL is specified, it does not work for patterns, and run make in parallel, which can break things. Add a new rule "build", and let it call make. The pattern rule only needs to specify "build" as its prerequisite and have a no-op recipe so that it does more than canceling built-in implicit rules. Fixes: dedad02720 ("configure: add support for pseudo-"in source tree" builds") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-ID: <20231119101604.47325-1-akihiko.odaki@daynix.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24system: Use &error_abort in memory_region_init_ram_[device_]ptr()Philippe Mathieu-Daudé
If an unexpected error condition happens, we have to abort (&fatal_error is meant for expected errors). Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231120133112.82447-1-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24disas/cris: Pass buffer size to format_dec() to avoid overflow warningPhilippe Mathieu-Daudé
Propagate the buffer size to format_dec() and use snprintf(). This should silence this UBSan -Wformat-overflow warning: In file included from /usr/include/stdio.h:906, from include/qemu/osdep.h:114, from ../disas/cris.c:21: In function 'sprintf', inlined from 'format_dec' at ../disas/cris.c:1737:3, inlined from 'print_with_operands' at ../disas/cris.c:2477:12, inlined from 'print_insn_cris_generic.constprop' at ../disas/cris.c:2690:8: /usr/include/bits/stdio2.h:30:10: warning: null destination pointer [-Wformat-overflow=] 30 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 31 | __glibc_objsize (__s), __fmt, | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 32 | __va_arg_pack ()); | ~~~~~~~~~~~~~~~~~ Reported-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231120132222.82138-1-philmd@linaro.org> [Rewritten to fix logic and avoid repeated expression. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24audio: Free consumed default audio devicesAkihiko Odaki
Failed default audio devices were removed from the list but not freed, and that made LeakSanitizer sad. Free default audio devices as they are consumed. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20231120112804.9736-1-akihiko.odaki@daynix.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24.gitlab-ci.d/cirrus: Add manual testing of macOS 14 (Sonoma)Philippe Mathieu-Daudé
Upgrade libvirt-ci so it covers macOS 14. Add a manual entry (QEMU_JOB_OPTIONAL: 1) to test on Sonoma release. Refresh the lci-tool generated files. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231109160504.93677-3-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24buildsys: Bump known good meson version to v1.2.3Philippe Mathieu-Daudé
We need meson v1.2.3 to build QEMU on macOS Sonoma. It also builds fine all our CI jobs (as tested by also bumping "accepted" in pythondeps.toml), so let's use it as our "good enough" packaged wheel. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1939 Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231109160504.93677-2-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24docs: document what configure does with virtual environmentsPaolo Bonzini
Given the recent confusion around how QEMU detects the system Meson installation, and/or decides to install its own, it is time to fill in the "Python virtual environments and the QEMU build system" section of the documentation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24Merge tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/stsquad/qemu ↵Stefan Hajnoczi
into staging various random fixes for 8.2 - replace fedora-i386 cross compiler with debian - update cirrus MacOS image to Ventura - merge debian-native and debian-amd64 docker images - fix compile of plugins on Windows mingw cross - add some doc notes on semihosting READC - add some doc notes on gdbstub - skip loading debug symbols if we have failed - enable arm-softmmu TCG tests - don't attempt to use native cross builds for linux-user - clean up registers gdb test case (ppc64/s390x) # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmVfXowACgkQ+9DbCVqe # KkQY6Af5AVjPG2aHmixvhTjxEx5dXAH3cGYsWbny3EByT2RijaTBBK/A4OB7RTVV # fr11kGpCkJDk4JPoUz4yTuw6Q+7WBmB0tJJ5wcGyC9cyCjI/PttSTJUC7hiikifw # dg1IVrJZX0ahOpUiDXAtDbeHK1/i95mDRtot40mnyv5HHYHlJKohKsUVtiQEWMeq # 0/X/M5Zq8oJ6wCkbw1nsCqkWpZa7eh4YcB9cGNf87dd0ZJ9M93CbjdSQlsugF2gB # pH+5ZGOj+L/zkbEKoaWJNwYzF4G6hJeLpqP2rLMqRfA5MM43wdd0dJ6gK0ylKeuR # Bo7jC1oEOcuLibZY40OhlOwLTMWiDg== # =ME/l # -----END PGP SIGNATURE----- # gpg: Signature made Thu 23 Nov 2023 09:15:40 EST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/stsquad/qemu: tests/tcg: finesse the registers check for "hidden" regs configure: don't try a "native" cross for linux-user tests/tcg: enable semiconsole test for Arm tests/tcg: enable arm softmmu tests testing: move arm system tests into their own folder hw/core: skip loading debug on all failures docs/system: clarify limits of using gdbstub in system emulation docs/emulation: expand warning about semihosting tests/tcg: fixup Aarch64 semiconsole test target/nios2: Deprecate the Nios II architecture plugins: fix win plugin tests on cross compile tests/docker: merge debian-native with debian-amd64 .gitlab-ci.d/cirrus: Upgrade macOS to 13 (Ventura) tests/docker: replace fedora-i386 with debian-i686 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-24tests: respect --enable/--disable-download for AvocadoPaolo Bonzini
Pass the content of $mkvenv_flags (which is either "--online" or empty) down to tests/Makefile.include. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-24coverity: physmem: use simple assertions instead of modellingVladimir Sementsov-Ogievskiy
Unfortunately Coverity doesn't follow the logic aroung "len" and "l" variables in stacks finishing with flatview_{read,write}_continue() and generate a lot of OVERRUN false-positives. When small buffer (2 or 4 bytes) is passed to mem read/write path, Coverity assumes the worst case of sz=8 in stn_he_p()/ldn_he_p() (defined in include/qemu/bswap.h), and reports buffer overrun. To silence these false-positives we have model functions, which hide real logic from Coverity. However, it turned out that these new two assertions are enough to quiet Coverity. Assertions are better than hiding the logic, so let's drop the modelling and move to assertions for memory r/w call stacks. After patch, the sequence cov-make-library --output-file /tmp/master.xmldb \ scripts/coverity-scan/model.c cov-build --dir ~/covtmp/master make -j9 cov-analyze --user-model-file /tmp/master.xmldb \ --dir ~/covtmp/master --all --strip-path "$(pwd) cov-format-errors --dir ~/covtmp/master \ --html-output ~/covtmp/master_html_report Generate for me the same big set of CIDs excepept for 6 disappeared (so it becomes even better). Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Acked-by: David Hildenbrand <david@redhat.com> Message-ID: <20231005140326.332830-1-vsementsov@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-11-23tests/tcg: finesse the registers check for "hidden" regsAlex Bennée
The reason the ppc64 and s390x test where failing was because gdb hides them although they are still accessible via regnum. We can re-arrange the test a little bit and include these two arches in our test. We also need to be a bit more careful handling remote-registers as the format isn't easily parsed with pure white space separation. Once we fold types like "long long" and "long double" into a single word we can now assert all registers are either listed or elided. Cc: Ilya Leoshkevich <iii@linux.ibm.com> Cc: <qemu-s390x@nongnu.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Daniel Henrique Barboza <danielhb413@gmail.com> Cc: <qemu-ppc@nongnu.org> Cc: Luis Machado <luis.machado@arm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231121153606.542101-1-alex.bennee@linaro.org>
2023-11-23configure: don't try a "native" cross for linux-userAlex Bennée
As 32 bit x86 become rarer we are starting to run into problems with search paths. Although we switched to a Debian container we still favour the native CC on a Bookworm host. As a result we have a broken cross compile setup which then fails to build with: BUILD i386-linux-user guest-tests In file included from /usr/include/linux/stat.h:5, from /usr/include/bits/statx.h:31, from /usr/include/sys/stat.h:465, from /home/alex/lsrc/qemu.git/tests/tcg/multiarch/linux/linux-test.c:28: /usr/include/linux/types.h:5:10: fatal error: asm/types.h: No such file or directory 5 | #include <asm/types.h> | ^~~~~~~~~~~~~ compilation terminated. make[1]: *** [Makefile:119: linux-test] Error 1 make: *** [/home/alex/lsrc/qemu.git/tests/Makefile.include:50: build-tcg-tests-i386-linux-user] Error 2 This is likely to affect more and more linux-user builds so wrap the whole check in a test for softmmu targets (aka bare metal) which don't worry about such header niceties. This allows us to keep using the host compiler for softmmu tests and the roms. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-14-alex.bennee@linaro.org>
2023-11-23tests/tcg: enable semiconsole test for ArmAlex Bennée
This still remains a MANUAL test due to blocking issues. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-13-alex.bennee@linaro.org>
2023-11-23tests/tcg: enable arm softmmu testsAlex Bennée
To make it easier to test 32 bit Arm softmmu issues implement a basic boot.S so we can build the multiarch tests. Currently CHECK_UNALIGNED is disabled as I haven't got the right magic set for it to work. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231120150833.2552739-12-alex.bennee@linaro.org>
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