aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2013-07-27cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XMLAndreas Färber
Replace the GDB_CORE_XML define in gdbstub.c with a CPUClass field. Use first_cpu for qSupported and qXfer:features:read: for now. Add a stub for xml_builtin. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-cris: Factor out CPUClass::gdb_read_register() hook for v10Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber
This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-xtensa: Move cpu_gdb_{read,write}_register()Andreas Färber
Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-lm32: Move cpu_gdb_{read,write}_register()Andreas Färber
Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-s390x: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-alpha: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-cris: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-microblaze: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-sh4: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-openrisc: Move cpu_gdb_{read,write}_register()Andreas Färber
Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-mips: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-m68k: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-arm: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-sparc: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-ppc: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-i386: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber
CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26gdbstub: Drop dead code in cpu_gdb_{read,write}_register()Andreas Färber
GET_REG*() macros include a return statement, thus no need for break. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26gdbstub: Fix cpu_gdb_{read,write}_register() Coding StyleAndreas Färber
Add braces, replace tabs, remove trailing whitespace, drop space before parenthesis and place break etc. below case statements. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-xtensa: Introduce XtensaCPU subclassesAndreas Färber
Register a CPU type per core registered. Save the XtensaConfig in XtensaCPUClass and copy it from there to CPUXtensaState, to avoid touching every env->config access for now. Prepares for storing per-class GDB register count. Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26target-s390x: Fix CPUState rework falloutChristian Borntraeger
Commit f17ec444c3d39f76bcd8b71c2c05d5754bfe333e exec: Change cpu_memory_rw_debug() argument to CPUState missed to update s390x KVM code, breaking the build. Let's fix it up. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26kvm: Change prototype of kvm_update_guest_debug()Stefan Weil
Passing a CPUState pointer instead of a CPUArchState pointer eliminates the last target dependent data type in sysemu/kvm.h. It also simplifies the code. Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26linux-user: Avoid redundant ENV_GET_CPU()Andreas Färber
This fixes a mismerge in 874ec3c5b3821bb964f9f37b2f930f2a9ce51652. Acked-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26Merge remote-tracking branch 'rth/tcg-next' into stagingAnthony Liguori
# By Claudio Fontana (1) and others # Via Richard Henderson * rth/tcg-next: tcg: Remove temp_buf tcg/aarch64: Implement tlb lookup fast path tcg/aarch64: implement ldst 12bit scaled uimm offset Message-id: 1373919944-8521-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-26Merge remote-tracking branch 'jliu/or32' into stagingAnthony Liguori
# By Jia Liu # Via Jia Liu * jliu/or32: target-openrisc: Free typename in openrisc_cpu_class_by_name hw/openrisc: Use stderr output instead of qemu_log hw/openrisc: Indent typo Message-id: 1374576458-22808-1-git-send-email-proljc@gmail.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25Merge remote-tracking branch 'mdroth/qga-pull-2013-7-25' into stagingAnthony Liguori
# By Laszlo Ersek # Via Michael Roth * mdroth/qga-pull-2013-7-25: qga: escape cmdline args when registering win32 service (CVE-2013-2231) ga_install_service(): nest error paths more idiomatically qga/service-win32.c: diagnostic output should go to stderr Message-id: 1374784644-29078-1-git-send-email-mdroth@linux.vnet.ibm.com
2013-07-25Merge remote-tracking branch 'kraxel/seabios-1.7.3' into stagingAnthony Liguori
# By Gerd Hoffmann # Via Gerd Hoffmann * kraxel/seabios-1.7.3: seabios: update to 1.7.3 Message-id: 1374673573-25074-1-git-send-email-kraxel@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25Merge remote-tracking branch 'riku/linux-user-for-upstream' into stagingAnthony Liguori
* riku/linux-user-for-upstream: (21 commits) linux-user: Handle compressed ISA encodings when processing MIPS exceptions linux-user: Unlock mmap_lock when resuming guest from page_unprotect linux-user: Reset copied CPUs in cpu_copy() always linux-user: Fix epoll on ARM hosts linux-user: fix segmentation fault passing with h2g(x) != x linux-user: Fix pipe syscall return for SPARC linux-user: Fix target_stat and target_stat64 for OpenRISC linux-user: Avoid conditional cpu_reset() configure: Make NPTL non-optional linux-user: Enable NPTL for x86-64 linux-user: Add i386 TLS setter linux-user: Clean up handling of clone() argument order linux-user: Add missing 'break' in i386 get_thread_area syscall linux-user: Enable NPTL for m68k linux-user: Enable NPTL for SPARC targets linux-user: Enable NPTL for OpenRISC linux-user: Move includes of target-specific headers to end of qemu.h configure: Enable threading for unicore32-linux-user configure: Enable threading on all ppc and mips linux-user targets configure: Don't say target_nptl="no" if there is no linux-user target ... Conflicts: linux-user/main.c Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25qga: escape cmdline args when registering win32 service (CVE-2013-2231)Laszlo Ersek
Reported-by: Lev Veyde <lveyde@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2013-07-25ga_install_service(): nest error paths more idiomaticallyLaszlo Ersek
Acked-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2013-07-25qga/service-win32.c: diagnostic output should go to stderrLaszlo Ersek
Acked-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2013-07-25pc-testdev: add I/O port to test memory.c auto split/combinePaolo Bonzini
The ports at 0xe8..0xeb have impl.min/max_access_size == 1, so that memory accesses are split and combined by the memory core. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-29-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25memory: check memory region endianness, not target'sPaolo Bonzini
When combining multiple accesses into a single value, we need to do so in the device's desired endianness. The target endianness does not have any influence. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-28-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25memory: pass MemoryRegion to access_with_adjusted_sizePaolo Bonzini
The accessors all use a MemoryRegion opaque value. Avoid going uselessly through void*. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-27-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25memory: move functions aroundPaolo Bonzini
Prepare for next patch, no semantic change. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-26-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25qtest: add test for ISA I/O space endiannessPaolo Bonzini
This writes a register and reads its 1/2/4 byte parts. Masking is done in the device model. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-25-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25default-configs/ppc64: add all components of i82378 SuperIO chip used by prepPaolo Bonzini
The device provides an ISA bus so that pseries can also run the endianness test. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-24-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25default-configs: add SuperIO to SH4Paolo Bonzini
The device provides an ISA bus to run the endianness test on. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-23-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25default-configs: add test device to all machines supporting ISAPaolo Bonzini
This will let these machines run an endianness test for ISA I/O port space. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-22-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25sparc64: unbreakPaolo Bonzini
... by making apb a subclass of TYPE_PCI_HOST_BRIDGE. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-21-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25sh4: unbreak r2dPaolo Bonzini
... by making sh_pci a subclass of TYPE_PCI_HOST_BRIDGE. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-20-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25mips: degrade BIOS error to warningPaolo Bonzini
No free MIPS BIOS is available, so it makes little sense to quit. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-19-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25pc-testdev: remove useless cpu_to_le64/le64_to_cpuPaolo Bonzini
So far the device was only used on little-endian machines. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-18-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25pc-testdev: support 8 and 16-bit accesses to 0xe0Paolo Bonzini
This will let us use the testdev to test endianness. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-17-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25Revert "ioport: remove LITTLE_ENDIAN mark for portio"Paolo Bonzini
This reverts commit c3cb8e77804313e1be99b5f28a34a346736707a5. The scenario where I/O ports are accessed with DEVICE_LITTLE_ENDIAN endianness now works and will soon be unit tested. Since the PortioList indirection assumes little endian, define portio_ops the same way. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-16-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25isa_mmio: deletePaolo Bonzini
It is not used anymore. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-15-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25ebus: do not use isa_mmioPaolo Bonzini
This is untested, because ebus does not have a libqos module. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-14-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25sparc64: remove indirection for I/O port accessPaolo Bonzini
This fixes endianness bugs in I/O port access. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-13-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-23 23:35:32 +0000