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-rw-r--r--target/arm/translate-a32.h4
-rw-r--r--target/arm/vec_internal.h6
-rw-r--r--target/avr/cpu-qom.h6
-rw-r--r--target/hexagon/hex_arch_types.h4
-rw-r--r--target/hexagon/hex_regs.h4
-rw-r--r--target/i386/hax/hax-accel-ops.h6
-rw-r--r--target/i386/nvmm/nvmm-accel-ops.h6
-rw-r--r--target/i386/sev.h4
-rw-r--r--target/i386/whpx/whpx-accel-ops.h6
-rw-r--r--target/i386/whpx/whpx-internal.h6
-rw-r--r--target/xtensa/core-de233_fpu/core-isa.h7
-rw-r--r--target/xtensa/core-dsp3400/core-isa.h8
12 files changed, 32 insertions, 35 deletions
diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h
index 09010ad2da..78a84c1414 100644
--- a/target/arm/translate-a32.h
+++ b/target/arm/translate-a32.h
@@ -17,8 +17,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef TARGET_ARM_TRANSLATE_A64_H
-#define TARGET_ARM_TRANSLATE_A64_H
+#ifndef TARGET_ARM_TRANSLATE_A32_H
+#define TARGET_ARM_TRANSLATE_A32_H
/* Prototypes for autogenerated disassembler functions */
bool disas_m_nocp(DisasContext *dc, uint32_t insn);
diff --git a/target/arm/vec_internal.h b/target/arm/vec_internal.h
index fb43a2380e..1d63402042 100644
--- a/target/arm/vec_internal.h
+++ b/target/arm/vec_internal.h
@@ -17,8 +17,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef TARGET_ARM_VEC_INTERNALS_H
-#define TARGET_ARM_VEC_INTERNALS_H
+#ifndef TARGET_ARM_VEC_INTERNAL_H
+#define TARGET_ARM_VEC_INTERNAL_H
/*
* Note that vector data is stored in host-endian 64-bit chunks,
@@ -217,4 +217,4 @@ uint64_t pmull_h(uint64_t op1, uint64_t op2);
*/
uint64_t pmull_w(uint64_t op1, uint64_t op2);
-#endif /* TARGET_ARM_VEC_INTERNALS_H */
+#endif /* TARGET_ARM_VEC_INTERNAL_H */
diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h
index 32a1c762e6..b5c3507d6d 100644
--- a/target/avr/cpu-qom.h
+++ b/target/avr/cpu-qom.h
@@ -18,8 +18,8 @@
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
-#ifndef QEMU_AVR_QOM_H
-#define QEMU_AVR_QOM_H
+#ifndef TARGET_AVR_CPU_QOM_H
+#define TARGET_AVR_CPU_QOM_H
#include "hw/core/cpu.h"
#include "qom/object.h"
@@ -44,4 +44,4 @@ struct AVRCPUClass {
};
-#endif /* !defined (QEMU_AVR_CPU_QOM_H) */
+#endif /* TARGET_AVR_CPU_QOM_H */
diff --git a/target/hexagon/hex_arch_types.h b/target/hexagon/hex_arch_types.h
index 78ad607f53..885f68f760 100644
--- a/target/hexagon/hex_arch_types.h
+++ b/target/hexagon/hex_arch_types.h
@@ -15,8 +15,8 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HEXAGON_ARCH_TYPES_H
-#define HEXAGON_ARCH_TYPES_H
+#ifndef HEXAGON_HEX_ARCH_TYPES_H
+#define HEXAGON_HEX_ARCH_TYPES_H
#include "qemu/osdep.h"
#include "mmvec/mmvec.h"
diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
index e1b3149b07..a63c2c0fd5 100644
--- a/target/hexagon/hex_regs.h
+++ b/target/hexagon/hex_regs.h
@@ -15,8 +15,8 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HEXAGON_REGS_H
-#define HEXAGON_REGS_H
+#ifndef HEXAGON_HEX_REGS_H
+#define HEXAGON_HEX_REGS_H
enum {
HEX_REG_R00 = 0,
diff --git a/target/i386/hax/hax-accel-ops.h b/target/i386/hax/hax-accel-ops.h
index c7698519cd..9e357e7b40 100644
--- a/target/i386/hax/hax-accel-ops.h
+++ b/target/i386/hax/hax-accel-ops.h
@@ -7,8 +7,8 @@
* See the COPYING file in the top-level directory.
*/
-#ifndef HAX_CPUS_H
-#define HAX_CPUS_H
+#ifndef TARGET_I386_HAX_ACCEL_OPS_H
+#define TARGET_I386_HAX_ACCEL_OPS_H
#include "sysemu/cpus.h"
@@ -28,4 +28,4 @@ int hax_vcpu_destroy(CPUState *cpu);
void hax_raise_event(CPUState *cpu);
void hax_reset_vcpu_state(void *opaque);
-#endif /* HAX_CPUS_H */
+#endif /* TARGET_I386_HAX_ACCEL_OPS_H */
diff --git a/target/i386/nvmm/nvmm-accel-ops.h b/target/i386/nvmm/nvmm-accel-ops.h
index 43e24adcaf..7c5461bd75 100644
--- a/target/i386/nvmm/nvmm-accel-ops.h
+++ b/target/i386/nvmm/nvmm-accel-ops.h
@@ -7,8 +7,8 @@
* See the COPYING file in the top-level directory.
*/
-#ifndef NVMM_CPUS_H
-#define NVMM_CPUS_H
+#ifndef TARGET_I386_NVMM_ACCEL_OPS_H
+#define TARGET_I386_NVMM_ACCEL_OPS_H
#include "sysemu/cpus.h"
@@ -21,4 +21,4 @@ void nvmm_cpu_synchronize_post_reset(CPUState *cpu);
void nvmm_cpu_synchronize_post_init(CPUState *cpu);
void nvmm_cpu_synchronize_pre_loadvm(CPUState *cpu);
-#endif /* NVMM_CPUS_H */
+#endif /* TARGET_I386_NVMM_ACCEL_OPS_H */
diff --git a/target/i386/sev.h b/target/i386/sev.h
index 83e82aa42c..7b1528248a 100644
--- a/target/i386/sev.h
+++ b/target/i386/sev.h
@@ -11,8 +11,8 @@
*
*/
-#ifndef QEMU_SEV_I386_H
-#define QEMU_SEV_I386_H
+#ifndef I386_SEV_H
+#define I386_SEV_H
#ifndef CONFIG_USER_ONLY
#include CONFIG_DEVICES /* CONFIG_SEV */
diff --git a/target/i386/whpx/whpx-accel-ops.h b/target/i386/whpx/whpx-accel-ops.h
index b5102dd1ee..7a1bb1ab57 100644
--- a/target/i386/whpx/whpx-accel-ops.h
+++ b/target/i386/whpx/whpx-accel-ops.h
@@ -7,8 +7,8 @@
* See the COPYING file in the top-level directory.
*/
-#ifndef WHPX_CPUS_H
-#define WHPX_CPUS_H
+#ifndef TARGET_I386_WHPX_ACCEL_OPS_H
+#define TARGET_I386_WHPX_ACCEL_OPS_H
#include "sysemu/cpus.h"
@@ -30,4 +30,4 @@ void whpx_cpu_synchronize_pre_resume(bool step_pending);
/* full state set, modified during initialization or on vmload */
#define WHPX_SET_FULL_STATE 3
-#endif /* WHPX_CPUS_H */
+#endif /* TARGET_I386_WHPX_ACCEL_OPS_H */
diff --git a/target/i386/whpx/whpx-internal.h b/target/i386/whpx/whpx-internal.h
index dbb7e7ba82..06429d8ccd 100644
--- a/target/i386/whpx/whpx-internal.h
+++ b/target/i386/whpx/whpx-internal.h
@@ -1,5 +1,5 @@
-#ifndef WHP_INTERNAL_H
-#define WHP_INTERNAL_H
+#ifndef TARGET_I386_WHPX_INTERNAL_H
+#define TARGET_I386_WHPX_INTERNAL_H
#include <windows.h>
#include <WinHvPlatform.h>
@@ -116,4 +116,4 @@ typedef enum WHPFunctionList {
WINHV_PLATFORM_FNS_SUPPLEMENTAL
} WHPFunctionList;
-#endif /* WHP_INTERNAL_H */
+#endif /* TARGET_I386_WHPX_INTERNAL_H */
diff --git a/target/xtensa/core-de233_fpu/core-isa.h b/target/xtensa/core-de233_fpu/core-isa.h
index f125619e8d..40543b2c5e 100644
--- a/target/xtensa/core-de233_fpu/core-isa.h
+++ b/target/xtensa/core-de233_fpu/core-isa.h
@@ -28,8 +28,8 @@
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
-#ifndef XTENSA_CORE_CONFIGURATION_H_
-#define XTENSA_CORE_CONFIGURATION_H_
+#ifndef XTENSA_CORE_DE233_FPU_CORE_ISA_H
+#define XTENSA_CORE_DE233_FPU_CORE_ISA_H
//depot/dev/Homewood/Xtensa/SWConfig/hal/core-common.h.tph#24 - edit change 444323 (text+ko)
@@ -723,5 +723,4 @@
#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
-#endif /* XTENSA_CORE_CONFIGURATION_H_ */
-
+#endif /* XTENSA_CORE_DE233_FPU_CORE_ISA_H */
diff --git a/target/xtensa/core-dsp3400/core-isa.h b/target/xtensa/core-dsp3400/core-isa.h
index 336b2467c6..1499ef2914 100644
--- a/target/xtensa/core-dsp3400/core-isa.h
+++ b/target/xtensa/core-dsp3400/core-isa.h
@@ -28,9 +28,8 @@
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
-#ifndef _XTENSA_CORE_CONFIGURATION_H
-#define _XTENSA_CORE_CONFIGURATION_H
-
+#ifndef XTENSA_CORE_DSP3400_CORE_ISA_H
+#define XTENSA_CORE_DSP3400_CORE_ISA_H
/****************************************************************************
Parameters Useful for Any Code, USER or PRIVILEGED
@@ -448,5 +447,4 @@
#endif /* !XTENSA_HAL_NON_PRIVILEGED_ONLY */
-#endif /* _XTENSA_CORE_CONFIGURATION_H */
-
+#endif /* XTENSA_CORE_DSP3400_CORE_ISA_H */
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-23 19:14:20 +0000