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Diffstat (limited to 'target/tilegx/cpu.h')
-rw-r--r--target/tilegx/cpu.h11
1 files changed, 7 insertions, 4 deletions
diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h
index 193b6bbccb..d6cc1d2982 100644
--- a/target/tilegx/cpu.h
+++ b/target/tilegx/cpu.h
@@ -21,6 +21,7 @@
#define TILEGX_CPU_H
#include "exec/cpu-defs.h"
+#include "qom/object.h"
/* TILE-Gx common register alias */
#define TILEGX_R_RE 0 /* 0 register, for function/syscall return value */
@@ -98,6 +99,8 @@ typedef struct CPUTLGState {
#define TYPE_TILEGX_CPU "tilegx-cpu"
+typedef struct TileGXCPU TileGXCPU;
+typedef struct TileGXCPUClass TileGXCPUClass;
#define TILEGX_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(TileGXCPUClass, (klass), TYPE_TILEGX_CPU)
#define TILEGX_CPU(obj) \
@@ -112,14 +115,14 @@ typedef struct CPUTLGState {
*
* A Tile-Gx CPU model.
*/
-typedef struct TileGXCPUClass {
+struct TileGXCPUClass {
/*< private >*/
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
DeviceReset parent_reset;
-} TileGXCPUClass;
+};
/**
* TileGXCPU:
@@ -127,14 +130,14 @@ typedef struct TileGXCPUClass {
*
* A Tile-GX CPU.
*/
-typedef struct TileGXCPU {
+struct TileGXCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUNegativeOffsetState neg;
CPUTLGState env;
-} TileGXCPU;
+};
/* TILE-Gx memory attributes */