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-rw-r--r--target/riscv/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index d2529b757a..d895a0af2c 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -311,6 +311,8 @@ struct CPUArchState {
/* Sstc CSRs */
uint64_t stimecmp;
+ uint64_t vstimecmp;
+
/* physical memory protection */
pmp_table_t pmp_state;
target_ulong mseccfg;
@@ -365,6 +367,8 @@ struct CPUArchState {
/* Fields from here on are preserved across CPU reset. */
QEMUTimer *stimer; /* Internal timer for S-mode interrupt */
+ QEMUTimer *vstimer; /* Internal timer for VS-mode interrupt */
+ bool vstime_irq;
hwaddr kernel_addr;
hwaddr fdt_addr;