diff options
Diffstat (limited to 'target/arm/translate.h')
| -rw-r--r-- | target/arm/translate.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h index 1eb432dc2c..a804ff65ac 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -6,9 +6,10 @@ /* internal defines */ typedef struct DisasContext { + DisasContextBase base; + target_ulong pc; uint32_t insn; - int is_jmp; /* Nonzero if this instruction has been conditionally skipped. */ int condjmp; /* The label that will be jumped to when the instruction is skipped. */ @@ -16,8 +17,6 @@ typedef struct DisasContext { /* Thumb-2 conditional execution bits. */ int condexec_mask; int condexec_cond; - struct TranslationBlock *tb; - int singlestep_enabled; int thumb; int sctlr_b; TCGMemOp be_data; @@ -150,7 +149,8 @@ static void disas_set_insn_syndrome(DisasContext *s, uint32_t syn) #ifdef TARGET_AARCH64 void a64_translate_init(void); -void gen_intermediate_code_a64(CPUState *cpu, TranslationBlock *tb); +void gen_intermediate_code_a64(DisasContextBase *db, CPUState *cpu, + TranslationBlock *tb); void gen_a64_set_pc_im(uint64_t val); void aarch64_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, int flags); @@ -159,7 +159,8 @@ static inline void a64_translate_init(void) { } -static inline void gen_intermediate_code_a64(CPUState *cpu, TranslationBlock *tb) +static inline void gen_intermediate_code_a64(DisasContextBase *db, CPUState *cpu, + TranslationBlock *tb) { } |