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-rw-r--r--target-mips/translate.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 897839ced9..a10bfa3a79 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19594,8 +19594,10 @@ void gen_intermediate_code(CPUMIPSState *env, struct TranslationBlock *tb)
save_cpu_state(&ctx, 1);
ctx.bstate = BS_BRANCH;
gen_helper_raise_exception_debug(cpu_env);
- /* Include the breakpoint location or the tb won't
- * be flushed when it must be. */
+ /* The address covered by the breakpoint must be included in
+ [tb->pc, tb->pc + tb->size) in order to for it to be
+ properly cleared -- thus we increment the PC here so that
+ the logic setting tb->size below does the right thing. */
ctx.pc += 4;
goto done_generating;
}