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Diffstat (limited to 'qemu-tech.texi')
| -rw-r--r-- | qemu-tech.texi | 25 |
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diff --git a/qemu-tech.texi b/qemu-tech.texi index 082b62c8e0..75ceea408c 100644 --- a/qemu-tech.texi +++ b/qemu-tech.texi @@ -214,7 +214,6 @@ SH4 @menu * QEMU compared to other emulators:: * Portable dynamic translation:: -* Condition code optimisations:: * CPU state optimisations:: * Translation cache:: * Direct block chaining:: @@ -290,30 +289,6 @@ performances. QEMU's dynamic translation backend is called TCG, for "Tiny Code Generator". For more information, please take a look at @code{tcg/README}. -@node Condition code optimisations -@section Condition code optimisations - -Lazy evaluation of CPU condition codes (@code{EFLAGS} register on x86) -is important for CPUs where every instruction sets the condition -codes. It tends to be less important on conventional RISC systems -where condition codes are only updated when explicitly requested. On -Sparc64, costly update of both 32 and 64 bit condition codes can be -avoided with lazy evaluation. - -Instead of computing the condition codes after each x86 instruction, -QEMU just stores one operand (called @code{CC_SRC}), the result -(called @code{CC_DST}) and the type of operation (called -@code{CC_OP}). When the condition codes are needed, the condition -codes can be calculated using this information. In addition, an -optimized calculation can be performed for some instruction types like -conditional branches. - -@code{CC_OP} is almost never explicitly set in the generated code -because it is known at translation time. - -The lazy condition code evaluation is used on x86, m68k, cris and -Sparc. ARM uses a simplified variant for the N and Z flags. - @node CPU state optimisations @section CPU state optimisations |