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-rw-r--r--hw/core/loader.c4
-rw-r--r--hw/intc/apic.c7
-rw-r--r--hw/misc/tz-mpc.c2
-rw-r--r--hw/sparc/sun4m.c5
4 files changed, 10 insertions, 8 deletions
diff --git a/hw/core/loader.c b/hw/core/loader.c
index aa0b3fc867..66a616608a 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -1103,8 +1103,8 @@ static void rom_reset(void *unused)
void *host = memory_region_get_ram_ptr(rom->mr);
memcpy(host, rom->data, rom->datasize);
} else {
- cpu_physical_memory_write_rom(rom->as, rom->addr, rom->data,
- rom->datasize);
+ address_space_write_rom(rom->as, rom->addr, MEMTXATTRS_UNSPECIFIED,
+ rom->data, rom->datasize);
}
if (rom->isrom) {
/* rom needs to be written only once */
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 97ffdd820f..c9dd65b3a0 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -122,9 +122,10 @@ static void apic_sync_vapic(APICCommonState *s, int sync_type)
}
vapic_state.irr = vector & 0xff;
- cpu_physical_memory_write_rom(&address_space_memory,
- s->vapic_paddr + start,
- ((void *)&vapic_state) + start, length);
+ address_space_write_rom(&address_space_memory,
+ s->vapic_paddr + start,
+ MEMTXATTRS_UNSPECIFIED,
+ ((void *)&vapic_state) + start, length);
}
}
diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c
index e0c58ba37e..fb48a1540b 100644
--- a/hw/misc/tz-mpc.c
+++ b/hw/misc/tz-mpc.c
@@ -448,7 +448,7 @@ static int tz_mpc_attrs_to_index(IOMMUMemoryRegion *iommu, MemTxAttrs attrs)
{
/* We treat unspecified attributes like secure. Transactions with
* unspecified attributes come from places like
- * cpu_physical_memory_write_rom() for initial image load, and we want
+ * rom_reset() for initial image load, and we want
* those to pass through the from-reset "everything is secure" config.
* All the real during-emulation transactions from the CPU will
* specify attributes.
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 3c29b68e67..639906cca3 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -559,8 +559,9 @@ static void idreg_init(hwaddr addr)
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, addr);
- cpu_physical_memory_write_rom(&address_space_memory,
- addr, idreg_data, sizeof(idreg_data));
+ address_space_write_rom(&address_space_memory, addr,
+ MEMTXATTRS_UNSPECIFIED,
+ idreg_data, sizeof(idreg_data));
}
#define MACIO_ID_REGISTER(obj) \