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-rw-r--r--hw/axis_dev88.c20
-rw-r--r--hw/cris_pic_cpu.c50
-rw-r--r--hw/etraxfs.c15
-rw-r--r--hw/etraxfs.h2
-rw-r--r--hw/etraxfs_pic.c73
5 files changed, 113 insertions, 47 deletions
diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c
index 980f609031..db7fbabe72 100644
--- a/hw/axis_dev88.c
+++ b/hw/axis_dev88.c
@@ -254,7 +254,9 @@ void axisdev88_init (ram_addr_t ram_size,
const char *initrd_filename, const char *cpu_model)
{
CPUState *env;
- qemu_irq *irq, *nmi;
+ DeviceState *dev;
+ SysBusDevice *s;
+ qemu_irq irq[30], nmi[2], *cpu_irq;
void *etraxfs_dmac;
struct etraxfs_dma_client *eth[2] = {NULL, NULL};
int kernel_size;
@@ -292,8 +294,20 @@ void axisdev88_init (ram_addr_t ram_size,
cpu_register_physical_memory(0x3001a000, 0x5c, gpio_regs);
- irq = etraxfs_pic_init(env, 0x3001c000);
- nmi = irq + 30;
+ cpu_irq = cris_pic_init_cpu(env);
+ dev = qdev_create(NULL, "etraxfs,pic");
+ /* FIXME: Is there a proper way to signal vectors to the CPU core? */
+ qdev_set_prop_ptr(dev, "interrupt_vector", &env->interrupt_vector);
+ qdev_init(dev);
+ s = sysbus_from_qdev(dev);
+ sysbus_mmio_map(s, 0, 0x3001c000);
+ sysbus_connect_irq(s, 0, cpu_irq[0]);
+ sysbus_connect_irq(s, 1, cpu_irq[1]);
+ for (i = 0; i < 30; i++) {
+ irq[i] = qdev_get_irq_sink(dev, i);
+ }
+ nmi[0] = qdev_get_irq_sink(dev, 30);
+ nmi[1] = qdev_get_irq_sink(dev, 31);
etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
for (i = 0; i < 10; i++) {
diff --git a/hw/cris_pic_cpu.c b/hw/cris_pic_cpu.c
new file mode 100644
index 0000000000..a92d445f29
--- /dev/null
+++ b/hw/cris_pic_cpu.c
@@ -0,0 +1,50 @@
+/*
+ * QEMU CRIS CPU interrupt wrapper logic.
+ *
+ * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "hw.h"
+#include "pc.h"
+#include "etraxfs.h"
+
+#define D(x)
+
+void pic_info(Monitor *mon)
+{}
+void irq_info(Monitor *mon)
+{}
+
+static void cris_pic_cpu_handler(void *opaque, int irq, int level)
+{
+ CPUState *env = (CPUState *)opaque;
+ int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
+
+ if (level)
+ cpu_interrupt(env, type);
+ else
+ cpu_reset_interrupt(env, type);
+}
+
+qemu_irq *cris_pic_init_cpu(CPUState *env)
+{
+ return qemu_allocate_irqs(cris_pic_cpu_handler, env, 2);
+}
diff --git a/hw/etraxfs.c b/hw/etraxfs.c
index 7b2db91979..9cdf41cb32 100644
--- a/hw/etraxfs.c
+++ b/hw/etraxfs.c
@@ -48,8 +48,9 @@ void bareetraxfs_init (ram_addr_t ram_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
+ DeviceState *dev;
CPUState *env;
- qemu_irq *irq, *nmi;
+ qemu_irq irq[30], nmi[2], *cpu_irq;
void *etraxfs_dmac;
struct etraxfs_dma_client *eth[2] = {NULL, NULL};
int kernel_size;
@@ -83,8 +84,16 @@ void bareetraxfs_init (ram_addr_t ram_size,
FLASH_SIZE >> 16,
1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
0x555, 0x2aa);
- irq = etraxfs_pic_init(env, 0x3001c000);
- nmi = irq + 30;
+ cpu_irq = cris_pic_init_cpu(env);
+ dev = sysbus_create_varargs("etraxfs,pic", 0x3001c000,
+ cpu_irq[0], cpu_irq[1], NULL);
+ /* FIXME: Is there a proper way to signal vectors to the CPU core? */
+ qdev_set_prop_ptr(dev, "interrupt_vector", &env->interrupt_vector);
+ for (i = 0; i < 30; i++) {
+ irq[i] = qdev_get_irq_sink(dev, i);
+ }
+ nmi[0] = qdev_get_irq_sink(dev, 30);
+ nmi[1] = qdev_get_irq_sink(dev, 31);
etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
for (i = 0; i < 10; i++) {
diff --git a/hw/etraxfs.h b/hw/etraxfs.h
index cdbe58bd9b..9cc30bee46 100644
--- a/hw/etraxfs.h
+++ b/hw/etraxfs.h
@@ -24,6 +24,6 @@
#include "etraxfs_dma.h"
-qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base);
+qemu_irq *cris_pic_init_cpu(CPUState *env);
void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
target_phys_addr_t base, int phyaddr);
diff --git a/hw/etraxfs_pic.c b/hw/etraxfs_pic.c
index 2795d4ce02..9f650de28d 100644
--- a/hw/etraxfs_pic.c
+++ b/hw/etraxfs_pic.c
@@ -22,7 +22,7 @@
* THE SOFTWARE.
*/
-#include <stdio.h>
+#include "sysbus.h"
#include "hw.h"
#include "pc.h"
#include "etraxfs.h"
@@ -36,15 +36,17 @@
#define R_R_GURU 4
#define R_MAX 5
-struct fs_pic_state
+struct etrax_pic
{
- CPUState *env;
+ SysBusDevice busdev;
+ uint32_t *interrupt_vector;
+ qemu_irq parent_irq;
+ qemu_irq parent_nmi;
uint32_t regs[R_MAX];
};
-static void pic_update(struct fs_pic_state *fs)
+static void pic_update(struct etrax_pic *fs)
{
- CPUState *env = fs->env;
uint32_t vector = 0;
int i;
@@ -66,21 +68,17 @@ static void pic_update(struct fs_pic_state *fs)
}
mv >>= 1;
}
- if (vector) {
- env->interrupt_vector = vector;
- D(printf("%s vector=%x\n", __func__, vector));
- cpu_interrupt(env, CPU_INTERRUPT_HARD);
- }
- } else {
- env->interrupt_vector = 0;
- cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
- D(printf("%s reset irqs\n", __func__));
}
+
+ if (fs->interrupt_vector) {
+ *fs->interrupt_vector = vector;
+ }
+ qemu_set_irq(fs->parent_irq, !!vector);
}
static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
{
- struct fs_pic_state *fs = opaque;
+ struct etrax_pic *fs = opaque;
uint32_t rval;
rval = fs->regs[addr >> 2];
@@ -91,7 +89,7 @@ static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
static void
pic_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
- struct fs_pic_state *fs = opaque;
+ struct etrax_pic *fs = opaque;
D(printf("%s addr=%x val=%x\n", __func__, addr, value));
if (addr == R_RW_MASK) {
@@ -110,18 +108,9 @@ static CPUWriteMemoryFunc *pic_write[] = {
&pic_writel,
};
-void pic_info(Monitor *mon)
-{
-}
-
-void irq_info(Monitor *mon)
-{
-}
-
static void nmi_handler(void *opaque, int irq, int level)
{
- struct fs_pic_state *fs = (void *)opaque;
- CPUState *env = fs->env;
+ struct etrax_pic *fs = (void *)opaque;
uint32_t mask;
mask = 1 << irq;
@@ -130,15 +119,12 @@ static void nmi_handler(void *opaque, int irq, int level)
else
fs->regs[R_R_NMI] &= ~mask;
- if (fs->regs[R_R_NMI])
- cpu_interrupt(env, CPU_INTERRUPT_NMI);
- else
- cpu_reset_interrupt(env, CPU_INTERRUPT_NMI);
+ qemu_set_irq(fs->parent_nmi, !!fs->regs[R_R_NMI]);
}
static void irq_handler(void *opaque, int irq, int level)
{
- struct fs_pic_state *fs = (void *)opaque;
+ struct etrax_pic *fs = (void *)opaque;
if (irq >= 30)
return nmi_handler(opaque, irq, level);
@@ -149,17 +135,24 @@ static void irq_handler(void *opaque, int irq, int level)
pic_update(fs);
}
-qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base)
+static void etraxfs_pic_init(SysBusDevice *dev)
{
- struct fs_pic_state *fs = NULL;
- qemu_irq *irq;
+ struct etrax_pic *s = FROM_SYSBUS(typeof (*s), dev);
int intr_vect_regs;
- fs = qemu_mallocz(sizeof *fs);
- fs->env = env;
- irq = qemu_allocate_irqs(irq_handler, fs, 32);
+ s->interrupt_vector = qdev_get_prop_ptr(&dev->qdev, "interrupt_vector");
+ qdev_init_irq_sink(&dev->qdev, irq_handler, 32);
+ sysbus_init_irq(dev, &s->parent_irq);
+ sysbus_init_irq(dev, &s->parent_nmi);
- intr_vect_regs = cpu_register_io_memory(0, pic_read, pic_write, fs);
- cpu_register_physical_memory(base, R_MAX * 4, intr_vect_regs);
- return irq;
+ intr_vect_regs = cpu_register_io_memory(0, pic_read, pic_write, s);
+ sysbus_init_mmio(dev, R_MAX * 4, intr_vect_regs);
}
+
+static void etraxfs_pic_register(void)
+{
+ sysbus_register_dev("etraxfs,pic", sizeof (struct etrax_pic),
+ etraxfs_pic_init);
+}
+
+device_init(etraxfs_pic_register)