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Diffstat (limited to 'hw/rdma/vmw')
-rw-r--r--hw/rdma/vmw/pvrdma.h10
-rw-r--r--hw/rdma/vmw/pvrdma_cmd.c2
-rw-r--r--hw/rdma/vmw/pvrdma_main.c8
3 files changed, 20 insertions, 0 deletions
diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h
index 0879224957..a8a04a253c 100644
--- a/hw/rdma/vmw/pvrdma.h
+++ b/hw/rdma/vmw/pvrdma.h
@@ -70,6 +70,14 @@ typedef struct DSRInfo {
PvrdmaRing cq;
} DSRInfo;
+typedef struct PVRDMADevStats {
+ uint64_t commands;
+ uint64_t regs_reads;
+ uint64_t regs_writes;
+ uint64_t uar_writes;
+ uint64_t interrupts;
+} PVRDMADevStats;
+
typedef struct PVRDMADev {
PCIDevice parent_obj;
MemoryRegion msix;
@@ -89,6 +97,7 @@ typedef struct PVRDMADev {
CharBackend mad_chr;
VMXNET3State *func0;
Notifier shutdown_notifier;
+ PVRDMADevStats stats;
} PVRDMADev;
#define PVRDMA_DEV(dev) OBJECT_CHECK(PVRDMADev, (dev), PVRDMA_HW_NAME)
@@ -123,6 +132,7 @@ static inline void post_interrupt(PVRDMADev *dev, unsigned vector)
PCIDevice *pci_dev = PCI_DEVICE(dev);
if (likely(!dev->interrupt_mask)) {
+ dev->stats.interrupts++;
msix_notify(pci_dev, vector);
}
}
diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c
index 21a55e225a..6d56746357 100644
--- a/hw/rdma/vmw/pvrdma_cmd.c
+++ b/hw/rdma/vmw/pvrdma_cmd.c
@@ -651,6 +651,8 @@ int pvrdma_exec_cmd(PVRDMADev *dev)
trace_pvrdma_exec_cmd(dsr_info->req->hdr.cmd, dsr_info->rsp->hdr.err);
+ dev->stats.commands++;
+
out:
set_reg_val(dev, PVRDMA_REG_ERR, err);
post_interrupt(dev, INTR_VEC_CMD_RING);
diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c
index 81ae08bd8d..dd35646324 100644
--- a/hw/rdma/vmw/pvrdma_main.c
+++ b/hw/rdma/vmw/pvrdma_main.c
@@ -337,6 +337,8 @@ static uint64_t pvrdma_regs_read(void *opaque, hwaddr addr, unsigned size)
PVRDMADev *dev = opaque;
uint32_t val;
+ dev->stats.regs_reads++;
+
if (get_reg_val(dev, addr, &val)) {
rdma_error_report("Failed to read REG value from address 0x%x",
(uint32_t)addr);
@@ -353,6 +355,8 @@ static void pvrdma_regs_write(void *opaque, hwaddr addr, uint64_t val,
{
PVRDMADev *dev = opaque;
+ dev->stats.regs_writes++;
+
if (set_reg_val(dev, addr, val)) {
rdma_error_report("Failed to set REG value, addr=0x%"PRIx64 ", val=0x%"PRIx64,
addr, val);
@@ -421,6 +425,8 @@ static void pvrdma_uar_write(void *opaque, hwaddr addr, uint64_t val,
{
PVRDMADev *dev = opaque;
+ dev->stats.uar_writes++;
+
switch (addr & 0xFFF) { /* Mask with 0xFFF as each UC gets page */
case PVRDMA_UAR_QP_OFFSET:
if (val & PVRDMA_UAR_QP_SEND) {
@@ -612,6 +618,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
goto out;
}
+ memset(&dev->stats, 0, sizeof(dev->stats));
+
dev->shutdown_notifier.notify = pvrdma_shutdown_notifier;
qemu_register_shutdown_notifier(&dev->shutdown_notifier);