diff options
Diffstat (limited to 'hw/ppc/ppc405_uc.c')
| -rw-r--r-- | hw/ppc/ppc405_uc.c | 70 |
1 files changed, 42 insertions, 28 deletions
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 3e191ae4af..fe047074a1 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -36,6 +36,9 @@ #include "sysemu/sysemu.h" #include "qemu/log.h" #include "exec/address-spaces.h" +#include "hw/intc/ppc-uic.h" +#include "hw/qdev-properties.h" +#include "qapi/error.h" //#define DEBUG_OPBA //#define DEBUG_SDRAM @@ -1446,14 +1449,15 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, MemoryRegion ram_memories[2], hwaddr ram_bases[2], hwaddr ram_sizes[2], - uint32_t sysclk, qemu_irq **picp, + uint32_t sysclk, DeviceState **uicdevp, int do_init) { clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup; qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4]; PowerPCCPU *cpu; CPUPPCState *env; - qemu_irq *pic, *irqs; + DeviceState *uicdev; + SysBusDevice *uicsbd; memset(clk_setup, 0, sizeof(clk_setup)); /* init CPUs */ @@ -1474,59 +1478,69 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, /* Initialize timers */ ppc_booke_timers_init(cpu, sysclk, 0); /* Universal interrupt controller */ - irqs = g_new0(qemu_irq, PPCUIC_OUTPUT_NB); - irqs[PPCUIC_OUTPUT_INT] = - ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; - irqs[PPCUIC_OUTPUT_CINT] = - ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; - pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); - *picp = pic; + uicdev = qdev_new(TYPE_PPC_UIC); + uicsbd = SYS_BUS_DEVICE(uicdev); + + object_property_set_link(OBJECT(uicdev), "cpu", OBJECT(cpu), + &error_fatal); + sysbus_realize_and_unref(uicsbd, &error_fatal); + + sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, + ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]); + sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, + ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]); + + *uicdevp = uicdev; + /* SDRAM controller */ /* XXX 405EP has no ECC interrupt */ - ppc4xx_sdram_init(env, pic[17], 2, ram_memories, + ppc4xx_sdram_init(env, qdev_get_gpio_in(uicdev, 17), 2, ram_memories, ram_bases, ram_sizes, do_init); /* External bus controller */ ppc405_ebc_init(env); /* DMA controller */ - dma_irqs[0] = pic[5]; - dma_irqs[1] = pic[6]; - dma_irqs[2] = pic[7]; - dma_irqs[3] = pic[8]; + dma_irqs[0] = qdev_get_gpio_in(uicdev, 5); + dma_irqs[1] = qdev_get_gpio_in(uicdev, 6); + dma_irqs[2] = qdev_get_gpio_in(uicdev, 7); + dma_irqs[3] = qdev_get_gpio_in(uicdev, 8); ppc405_dma_init(env, dma_irqs); /* IIC controller */ - sysbus_create_simple(TYPE_PPC4xx_I2C, 0xef600500, pic[2]); + sysbus_create_simple(TYPE_PPC4xx_I2C, 0xef600500, + qdev_get_gpio_in(uicdev, 2)); /* GPIO */ ppc405_gpio_init(0xef600700); /* Serial ports */ if (serial_hd(0) != NULL) { - serial_mm_init(address_space_mem, 0xef600300, 0, pic[0], + serial_mm_init(address_space_mem, 0xef600300, 0, + qdev_get_gpio_in(uicdev, 0), PPC_SERIAL_MM_BAUDBASE, serial_hd(0), DEVICE_BIG_ENDIAN); } if (serial_hd(1) != NULL) { - serial_mm_init(address_space_mem, 0xef600400, 0, pic[1], + serial_mm_init(address_space_mem, 0xef600400, 0, + qdev_get_gpio_in(uicdev, 1), PPC_SERIAL_MM_BAUDBASE, serial_hd(1), DEVICE_BIG_ENDIAN); } /* OCM */ ppc405_ocm_init(env); /* GPT */ - gpt_irqs[0] = pic[19]; - gpt_irqs[1] = pic[20]; - gpt_irqs[2] = pic[21]; - gpt_irqs[3] = pic[22]; - gpt_irqs[4] = pic[23]; + gpt_irqs[0] = qdev_get_gpio_in(uicdev, 19); + gpt_irqs[1] = qdev_get_gpio_in(uicdev, 20); + gpt_irqs[2] = qdev_get_gpio_in(uicdev, 21); + gpt_irqs[3] = qdev_get_gpio_in(uicdev, 22); + gpt_irqs[4] = qdev_get_gpio_in(uicdev, 23); ppc4xx_gpt_init(0xef600000, gpt_irqs); /* PCI */ - /* Uses pic[3], pic[16], pic[18] */ + /* Uses UIC IRQs 3, 16, 18 */ /* MAL */ - mal_irqs[0] = pic[11]; - mal_irqs[1] = pic[12]; - mal_irqs[2] = pic[13]; - mal_irqs[3] = pic[14]; + mal_irqs[0] = qdev_get_gpio_in(uicdev, 11); + mal_irqs[1] = qdev_get_gpio_in(uicdev, 12); + mal_irqs[2] = qdev_get_gpio_in(uicdev, 13); + mal_irqs[3] = qdev_get_gpio_in(uicdev, 14); ppc4xx_mal_init(env, 4, 2, mal_irqs); /* Ethernet */ - /* Uses pic[9], pic[15], pic[17] */ + /* Uses UIC IRQs 9, 15, 17 */ /* CPU control */ ppc405ep_cpc_init(env, clk_setup, sysclk); |