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Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/nseries.c2
-rw-r--r--hw/arm/omap1.c46
-rw-r--r--hw/arm/omap2.c12
-rw-r--r--hw/arm/palm.c14
-rw-r--r--hw/arm/pxa2xx.c46
-rw-r--r--hw/arm/pxa2xx_gpio.c6
-rw-r--r--hw/arm/pxa2xx_pic.c4
-rw-r--r--hw/arm/tosa.c10
-rw-r--r--hw/arm/virt.c27
9 files changed, 92 insertions, 75 deletions
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
index 58005b6619..32687afced 100644
--- a/hw/arm/nseries.c
+++ b/hw/arm/nseries.c
@@ -463,7 +463,7 @@ static uint32_t mipid_txrx(void *opaque, uint32_t cmd, int len)
uint8_t ret;
if (len > 9) {
- hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
+ hw_error("%s: FIXME: bad SPI word width %i\n", __func__, len);
}
if (s->p >= ARRAY_SIZE(s->resp)) {
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index b3e7625130..92e58f09c8 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -999,7 +999,7 @@ static uint64_t omap_id_read(void *opaque, hwaddr addr,
case omap1510:
return 0x03310115;
default:
- hw_error("%s: bad mpu model\n", __FUNCTION__);
+ hw_error("%s: bad mpu model\n", __func__);
}
break;
@@ -1010,7 +1010,7 @@ static uint64_t omap_id_read(void *opaque, hwaddr addr,
case omap1510:
return 0xfb47002f;
default:
- hw_error("%s: bad mpu model\n", __FUNCTION__);
+ hw_error("%s: bad mpu model\n", __func__);
}
break;
}
@@ -1716,8 +1716,8 @@ static void omap_clkm_write(void *opaque, hwaddr addr,
case 0x18: /* ARM_SYSST */
if ((s->clkm.clocking_scheme ^ (value >> 11)) & 7) {
s->clkm.clocking_scheme = (value >> 11) & 7;
- printf("%s: clocking scheme set to %s\n", __FUNCTION__,
- clkschemename[s->clkm.clocking_scheme]);
+ printf("%s: clocking scheme set to %s\n", __func__,
+ clkschemename[s->clkm.clocking_scheme]);
}
s->clkm.cold_start &= value & 0x3f;
return;
@@ -2129,14 +2129,14 @@ qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s)
void omap_mpuio_out_set(struct omap_mpuio_s *s, int line, qemu_irq handler)
{
if (line >= 16 || line < 0)
- hw_error("%s: No GPIO line %i\n", __FUNCTION__, line);
+ hw_error("%s: No GPIO line %i\n", __func__, line);
s->handler[line] = handler;
}
void omap_mpuio_key(struct omap_mpuio_s *s, int row, int col, int down)
{
if (row >= 5 || row < 0)
- hw_error("%s: No key %i-%i\n", __FUNCTION__, col, row);
+ hw_error("%s: No key %i-%i\n", __func__, col, row);
if (down)
s->buttons[row] |= 1 << col;
@@ -2313,7 +2313,7 @@ void omap_uwire_attach(struct omap_uwire_s *s,
uWireSlave *slave, int chipselect)
{
if (chipselect < 0 || chipselect > 3) {
- fprintf(stderr, "%s: Bad chipselect %i\n", __FUNCTION__, chipselect);
+ fprintf(stderr, "%s: Bad chipselect %i\n", __func__, chipselect);
exit(-1);
}
@@ -2335,7 +2335,7 @@ static void omap_pwl_update(struct omap_pwl_s *s)
if (output != s->output) {
s->output = output;
- printf("%s: Backlight now at %i/256\n", __FUNCTION__, output);
+ printf("%s: Backlight now at %i/256\n", __func__, output);
}
}
@@ -2473,7 +2473,7 @@ static void omap_pwt_write(void *opaque, hwaddr addr,
case 0x04: /* VRC */
if ((value ^ s->vrc) & 1) {
if (value & 1)
- printf("%s: %iHz buzz on\n", __FUNCTION__, (int)
+ printf("%s: %iHz buzz on\n", __func__, (int)
/* 1.5 MHz from a 12-MHz or 13-MHz PWT_CLK */
((omap_clk_getrate(s->clk) >> 3) /
/* Pre-multiplexer divider */
@@ -2490,7 +2490,7 @@ static void omap_pwt_write(void *opaque, hwaddr addr,
((value & (1 << 5)) ? 80 : 127) /
(107 * 55 * 63 * 127)));
else
- printf("%s: silence!\n", __FUNCTION__);
+ printf("%s: silence!\n", __func__);
}
s->vrc = value & 0x7f;
break;
@@ -2562,7 +2562,7 @@ static void omap_rtc_alarm_update(struct omap_rtc_s *s)
{
s->alarm_ti = mktimegm(&s->alarm_tm);
if (s->alarm_ti == -1)
- printf("%s: conversion failed\n", __FUNCTION__);
+ printf("%s: conversion failed\n", __func__);
}
static uint64_t omap_rtc_read(void *opaque, hwaddr addr,
@@ -3028,7 +3028,7 @@ static void omap_mcbsp_source_tick(void *opaque)
if (!s->rx_rate)
return;
if (s->rx_req)
- printf("%s: Rx FIFO overrun\n", __FUNCTION__);
+ printf("%s: Rx FIFO overrun\n", __func__);
s->rx_req = s->rx_rate << bps[(s->rcr[0] >> 5) & 7];
@@ -3074,7 +3074,7 @@ static void omap_mcbsp_sink_tick(void *opaque)
if (!s->tx_rate)
return;
if (s->tx_req)
- printf("%s: Tx FIFO underrun\n", __FUNCTION__);
+ printf("%s: Tx FIFO underrun\n", __func__);
s->tx_req = s->tx_rate << bps[(s->xcr[0] >> 5) & 7];
@@ -3176,7 +3176,7 @@ static uint64_t omap_mcbsp_read(void *opaque, hwaddr addr,
/* Fall through. */
case 0x02: /* DRR1 */
if (s->rx_req < 2) {
- printf("%s: Rx FIFO underrun\n", __FUNCTION__);
+ printf("%s: Rx FIFO underrun\n", __func__);
omap_mcbsp_rx_done(s);
} else {
s->tx_req -= 2;
@@ -3282,7 +3282,7 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
if (s->tx_req < 2)
omap_mcbsp_tx_done(s);
} else
- printf("%s: Tx FIFO overrun\n", __FUNCTION__);
+ printf("%s: Tx FIFO overrun\n", __func__);
return;
case 0x08: /* SPCR2 */
@@ -3297,7 +3297,7 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
s->spcr[0] &= 0x0006;
s->spcr[0] |= 0xf8f9 & value;
if (value & (1 << 15)) /* DLB */
- printf("%s: Digital Loopback mode enable attempt\n", __FUNCTION__);
+ printf("%s: Digital Loopback mode enable attempt\n", __func__);
if (~value & 1) { /* RRST */
s->spcr[0] &= ~6;
s->rx_req = 0;
@@ -3329,14 +3329,12 @@ static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
case 0x18: /* MCR2 */
s->mcr[1] = value & 0x03e3;
if (value & 3) /* XMCM */
- printf("%s: Tx channel selection mode enable attempt\n",
- __FUNCTION__);
+ printf("%s: Tx channel selection mode enable attempt\n", __func__);
return;
case 0x1a: /* MCR1 */
s->mcr[0] = value & 0x03e1;
if (value & 1) /* RMCM */
- printf("%s: Rx channel selection mode enable attempt\n",
- __FUNCTION__);
+ printf("%s: Rx channel selection mode enable attempt\n", __func__);
return;
case 0x1c: /* RCERA */
s->rcer[0] = value & 0xffff;
@@ -3418,7 +3416,7 @@ static void omap_mcbsp_writew(void *opaque, hwaddr addr,
if (s->tx_req < 4)
omap_mcbsp_tx_done(s);
} else
- printf("%s: Tx FIFO overrun\n", __FUNCTION__);
+ printf("%s: Tx FIFO overrun\n", __func__);
return;
}
@@ -3536,7 +3534,7 @@ static void omap_lpg_tick(void *opaque)
timer_mod(s->tm, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + s->on);
s->cycle = !s->cycle;
- printf("%s: LED is %s\n", __FUNCTION__, s->cycle ? "on" : "off");
+ printf("%s: LED is %s\n", __func__, s->cycle ? "on" : "off");
}
static void omap_lpg_update(struct omap_lpg_s *s)
@@ -3557,9 +3555,9 @@ static void omap_lpg_update(struct omap_lpg_s *s)
timer_del(s->tm);
if (on == period && s->on < s->period)
- printf("%s: LED is on\n", __FUNCTION__);
+ printf("%s: LED is on\n", __func__);
else if (on == 0 && s->on)
- printf("%s: LED is off\n", __FUNCTION__);
+ printf("%s: LED is off\n", __func__);
else if (on && (on != s->on || period != s->period)) {
s->cycle = 0;
s->on = on;
diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c
index f5b148881c..b53878b8b9 100644
--- a/hw/arm/omap2.c
+++ b/hw/arm/omap2.c
@@ -1312,7 +1312,7 @@ static void omap_prcm_apll_update(struct omap_prcm_s *s)
if (mode[0] == 1 || mode[0] == 2 || mode[1] == 1 || mode[1] == 2)
fprintf(stderr, "%s: bad EN_54M_PLL or bad EN_96M_PLL\n",
- __FUNCTION__);
+ __func__);
}
static void omap_prcm_dpll_update(struct omap_prcm_s *s)
@@ -1331,7 +1331,7 @@ static void omap_prcm_dpll_update(struct omap_prcm_s *s)
s->dpll_lock = 0;
switch (mode) {
case 0:
- fprintf(stderr, "%s: bad EN_DPLL\n", __FUNCTION__);
+ fprintf(stderr, "%s: bad EN_DPLL\n", __func__);
break;
case 1: /* Low-power bypass mode (Default) */
case 2: /* Fast-relock bypass mode */
@@ -1358,7 +1358,7 @@ static void omap_prcm_dpll_update(struct omap_prcm_s *s)
omap_clk_reparent(core, dpll_x2);
break;
case 3:
- fprintf(stderr, "%s: bad CORE_CLK_SRC\n", __FUNCTION__);
+ fprintf(stderr, "%s: bad CORE_CLK_SRC\n", __func__);
break;
}
}
@@ -1628,7 +1628,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr,
case 0x500: /* CM_CLKEN_PLL */
if (value & 0xffffff30)
fprintf(stderr, "%s: write 0s in CM_CLKEN_PLL for "
- "future compatibility\n", __FUNCTION__);
+ "future compatibility\n", __func__);
if ((s->clken[9] ^ value) & 0xcc) {
s->clken[9] &= ~0xcc;
s->clken[9] |= value & 0xcc;
@@ -1647,7 +1647,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr,
case 0x540: /* CM_CLKSEL1_PLL */
if (value & 0xfc4000d7)
fprintf(stderr, "%s: write 0s in CM_CLKSEL1_PLL for "
- "future compatibility\n", __FUNCTION__);
+ "future compatibility\n", __func__);
if ((s->clksel[5] ^ value) & 0x003fff00) {
s->clksel[5] = value & 0x03bfff28;
omap_prcm_dpll_update(s);
@@ -1659,7 +1659,7 @@ static void omap_prcm_write(void *opaque, hwaddr addr,
case 0x544: /* CM_CLKSEL2_PLL */
if (value & ~3)
fprintf(stderr, "%s: write 0s in CM_CLKSEL2_PLL[31:2] for "
- "future compatibility\n", __FUNCTION__);
+ "future compatibility\n", __func__);
if (s->clksel[6] != (value & 3)) {
s->clksel[6] = value & 3;
omap_prcm_dpll_update(s);
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index a1f55d79b4..285f43709d 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -44,7 +44,7 @@ static void static_write(void *opaque, hwaddr offset, uint64_t value,
{
#ifdef SPY
printf("%s: value %08lx written at " PA_FMT "\n",
- __FUNCTION__, value, offset);
+ __func__, value, offset);
#endif
}
@@ -127,11 +127,11 @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
switch (line) {
case 0:
printf("%s: current to MMC/SD card %sabled.\n",
- __FUNCTION__, level ? "dis" : "en");
+ __func__, level ? "dis" : "en");
break;
case 1:
printf("%s: internal speaker amplifier %s.\n",
- __FUNCTION__, level ? "down" : "on");
+ __func__, level ? "down" : "on");
break;
/* These LCD & Audio output signals have not been identified yet. */
@@ -139,12 +139,12 @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
case 3:
case 4:
printf("%s: LCD GPIO%i %s.\n",
- __FUNCTION__, line - 1, level ? "high" : "low");
+ __func__, line - 1, level ? "high" : "low");
break;
case 5:
case 6:
printf("%s: Audio GPIO%i %s.\n",
- __FUNCTION__, line - 4, level ? "high" : "low");
+ __func__, line - 4, level ? "high" : "low");
break;
}
}
@@ -234,7 +234,7 @@ static void palmte_init(MachineState *machine)
rom_size = get_image_size(option_rom[0].name);
if (rom_size > flash_size) {
fprintf(stderr, "%s: ROM image too big (%x > %x)\n",
- __FUNCTION__, rom_size, flash_size);
+ __func__, rom_size, flash_size);
rom_size = 0;
}
if (rom_size > 0) {
@@ -244,7 +244,7 @@ static void palmte_init(MachineState *machine)
}
if (rom_size < 0) {
fprintf(stderr, "%s: error loading '%s'\n",
- __FUNCTION__, option_rom[0].name);
+ __func__, option_rom[0].name);
}
}
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index ab691a7985..db860c238e 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -107,7 +107,7 @@ static uint64_t pxa2xx_pm_read(void *opaque, hwaddr addr,
return s->pm_regs[addr >> 2];
default:
fail:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -139,7 +139,7 @@ static void pxa2xx_pm_write(void *opaque, hwaddr addr,
break;
}
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
@@ -180,7 +180,7 @@ static uint64_t pxa2xx_cm_read(void *opaque, hwaddr addr,
return s->cm_regs[CCCR >> 2] | (3 << 28);
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -205,7 +205,7 @@ static void pxa2xx_cm_write(void *opaque, hwaddr addr,
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
@@ -410,7 +410,7 @@ static uint64_t pxa2xx_mm_read(void *opaque, hwaddr addr,
return s->mm_regs[addr >> 2];
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -429,7 +429,7 @@ static void pxa2xx_mm_write(void *opaque, hwaddr addr,
}
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
@@ -619,7 +619,7 @@ static uint64_t pxa2xx_ssp_read(void *opaque, hwaddr addr,
if (!s->enable)
return 0xffffffff;
if (s->rx_level < 1) {
- printf("%s: SSP Rx Underrun\n", __FUNCTION__);
+ printf("%s: SSP Rx Underrun\n", __func__);
return 0xffffffff;
}
s->rx_level --;
@@ -636,7 +636,7 @@ static uint64_t pxa2xx_ssp_read(void *opaque, hwaddr addr,
case SSACD:
return s->ssacd;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -653,9 +653,9 @@ static void pxa2xx_ssp_write(void *opaque, hwaddr addr,
s->sscr[0] = value & 0xc7ffffff;
s->enable = value & SSCR0_SSE;
if (value & SSCR0_MOD)
- printf("%s: Attempt to use network mode\n", __FUNCTION__);
+ printf("%s: Attempt to use network mode\n", __func__);
if (s->enable && SSCR0_DSS(value) < 4)
- printf("%s: Wrong data size: %i bits\n", __FUNCTION__,
+ printf("%s: Wrong data size: %i bits\n", __func__,
SSCR0_DSS(value));
if (!(value & SSCR0_SSE)) {
s->sssr = 0;
@@ -668,7 +668,7 @@ static void pxa2xx_ssp_write(void *opaque, hwaddr addr,
case SSCR1:
s->sscr[1] = value;
if (value & (SSCR1_LBM | SSCR1_EFWR))
- printf("%s: Attempt to use SSP test mode\n", __FUNCTION__);
+ printf("%s: Attempt to use SSP test mode\n", __func__);
pxa2xx_ssp_fifo_update(s);
break;
@@ -728,7 +728,7 @@ static void pxa2xx_ssp_write(void *opaque, hwaddr addr,
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
}
@@ -990,7 +990,7 @@ static uint64_t pxa2xx_rtc_read(void *opaque, hwaddr addr,
else
return s->last_swcr;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -1096,7 +1096,7 @@ static void pxa2xx_rtc_write(void *opaque, hwaddr addr,
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
@@ -1344,7 +1344,7 @@ static uint64_t pxa2xx_i2c_read(void *opaque, hwaddr addr,
s->ibmr = 0;
return s->ibmr;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -1417,7 +1417,7 @@ static void pxa2xx_i2c_write(void *opaque, hwaddr addr,
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
@@ -1618,7 +1618,7 @@ static uint64_t pxa2xx_i2s_read(void *opaque, hwaddr addr,
}
return 0;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -1641,14 +1641,14 @@ static void pxa2xx_i2s_write(void *opaque, hwaddr addr,
s->status &= ~(1 << 7); /* I2SOFF */
}
if (value & (1 << 4)) /* EFWR */
- printf("%s: Attempt to use special function\n", __FUNCTION__);
+ printf("%s: Attempt to use special function\n", __func__);
s->enable = (value & 9) == 1; /* ENB && !RST*/
pxa2xx_i2s_update(s);
break;
case SACR1:
s->control[1] = value & 0x0039;
if (value & (1 << 5)) /* ENLBF */
- printf("%s: Attempt to use loopback function\n", __FUNCTION__);
+ printf("%s: Attempt to use loopback function\n", __func__);
if (value & (1 << 4)) /* DPRL */
s->fifo_len = 0;
pxa2xx_i2s_update(s);
@@ -1675,7 +1675,7 @@ static void pxa2xx_i2s_write(void *opaque, hwaddr addr,
}
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
@@ -1851,7 +1851,7 @@ static uint64_t pxa2xx_fir_read(void *opaque, hwaddr addr,
pxa2xx_fir_update(s);
return ret;
}
- printf("%s: Rx FIFO underrun.\n", __FUNCTION__);
+ printf("%s: Rx FIFO underrun.\n", __func__);
break;
case ICSR0:
return s->status[0];
@@ -1860,7 +1860,7 @@ static uint64_t pxa2xx_fir_read(void *opaque, hwaddr addr,
case ICFOR:
return s->rx_len;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
break;
}
return 0;
@@ -1912,7 +1912,7 @@ static void pxa2xx_fir_write(void *opaque, hwaddr addr,
case ICFOR:
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __FUNCTION__, addr);
+ printf("%s: Bad register " REG_FMT "\n", __func__, addr);
}
}
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index 521dbad039..e15070188e 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -107,7 +107,7 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level)
uint32_t mask;
if (line >= s->lines) {
- printf("%s: No GPIO pin %i\n", __FUNCTION__, line);
+ printf("%s: No GPIO pin %i\n", __func__, line);
return;
}
@@ -195,7 +195,7 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr offset,
return s->status[bank];
default:
- hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
+ hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
}
return 0;
@@ -248,7 +248,7 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr offset,
break;
default:
- hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
+ hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
}
}
diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c
index b516ced8c0..61275fa040 100644
--- a/hw/arm/pxa2xx_pic.c
+++ b/hw/arm/pxa2xx_pic.c
@@ -165,7 +165,7 @@ static uint64_t pxa2xx_pic_mem_read(void *opaque, hwaddr offset,
case ICHP: /* Highest Priority register */
return pxa2xx_pic_highest(s);
default:
- printf("%s: Bad register offset " REG_FMT "\n", __FUNCTION__, offset);
+ printf("%s: Bad register offset " REG_FMT "\n", __func__, offset);
return 0;
}
}
@@ -198,7 +198,7 @@ static void pxa2xx_pic_mem_write(void *opaque, hwaddr offset,
s->priority[32 + ((offset - IPR32) >> 2)] = value & 0x8000003f;
break;
default:
- printf("%s: Bad register offset " REG_FMT "\n", __FUNCTION__, offset);
+ printf("%s: Bad register offset " REG_FMT "\n", __func__, offset);
return;
}
pxa2xx_pic_update(opaque);
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 044796350a..a55b1a369c 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -159,7 +159,7 @@ static int tosa_dac_send(I2CSlave *i2c, uint8_t data)
s->buf[s->len] = data;
if (s->len ++ > 2) {
#ifdef VERBOSE
- fprintf(stderr, "%s: message too long (%i bytes)\n", __FUNCTION__, s->len);
+ fprintf(stderr, "%s: message too long (%i bytes)\n", __func__, s->len);
#endif
return 1;
}
@@ -181,14 +181,14 @@ static int tosa_dac_event(I2CSlave *i2c, enum i2c_event event)
case I2C_START_SEND:
break;
case I2C_START_RECV:
- printf("%s: recv not supported!!!\n", __FUNCTION__);
+ printf("%s: recv not supported!!!\n", __func__);
break;
case I2C_FINISH:
#ifdef VERBOSE
if (s->len < 2)
- printf("%s: message too short (%i bytes)\n", __FUNCTION__, s->len);
+ printf("%s: message too short (%i bytes)\n", __func__, s->len);
if (s->len > 2)
- printf("%s: message too long\n", __FUNCTION__);
+ printf("%s: message too long\n", __func__);
#endif
break;
default:
@@ -200,7 +200,7 @@ static int tosa_dac_event(I2CSlave *i2c, enum i2c_event event)
static int tosa_dac_recv(I2CSlave *s)
{
- printf("%s: recv not supported!!!\n", __FUNCTION__);
+ printf("%s: recv not supported!!!\n", __func__);
return -1;
}
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 151592b1e5..a4537af400 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -34,6 +34,8 @@
#include "hw/arm/arm.h"
#include "hw/arm/primecell.h"
#include "hw/arm/virt.h"
+#include "hw/vfio/vfio-calxeda-xgmac.h"
+#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/devices.h"
#include "net/net.h"
#include "sysemu/block-backend.h"
@@ -1357,7 +1359,7 @@ static void machvirt_init(MachineState *machine)
break;
}
- cpuobj = object_new(machine->cpu_type);
+ cpuobj = object_new(possible_cpus->cpus[n].type);
object_property_set_int(cpuobj, possible_cpus->cpus[n].arch_id,
"mp-affinity", NULL);
@@ -1573,6 +1575,7 @@ static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms)
sizeof(CPUArchId) * max_cpus);
ms->possible_cpus->len = max_cpus;
for (n = 0; n < ms->possible_cpus->len; n++) {
+ ms->possible_cpus->cpus[n].type = ms->cpu_type;
ms->possible_cpus->cpus[n].arch_id =
virt_cpu_mp_affinity(vms, n);
ms->possible_cpus->cpus[n].props.has_thread_id = true;
@@ -1591,7 +1594,8 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
* configuration of the particular instance.
*/
mc->max_cpus = 255;
- mc->has_dynamic_sysbus = true;
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_CALXEDA_XGMAC);
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
mc->pci_allow_0_address = true;
@@ -1618,7 +1622,7 @@ static void machvirt_machine_init(void)
}
type_init(machvirt_machine_init);
-static void virt_2_11_instance_init(Object *obj)
+static void virt_2_12_instance_init(Object *obj)
{
VirtMachineState *vms = VIRT_MACHINE(obj);
VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
@@ -1678,10 +1682,25 @@ static void virt_2_11_instance_init(Object *obj)
vms->irqmap = a15irqmap;
}
+static void virt_machine_2_12_options(MachineClass *mc)
+{
+}
+DEFINE_VIRT_MACHINE_AS_LATEST(2, 12)
+
+#define VIRT_COMPAT_2_11 \
+ HW_COMPAT_2_11
+
+static void virt_2_11_instance_init(Object *obj)
+{
+ virt_2_12_instance_init(obj);
+}
+
static void virt_machine_2_11_options(MachineClass *mc)
{
+ virt_machine_2_12_options(mc);
+ SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11);
}
-DEFINE_VIRT_MACHINE_AS_LATEST(2, 11)
+DEFINE_VIRT_MACHINE(2, 11)
#define VIRT_COMPAT_2_10 \
HW_COMPAT_2_10
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-01 23:55:47 +0000