aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--hw/pci/pci.c24
-rw-r--r--hw/pci/pci_host.c2
-rw-r--r--hw/ppc/spapr_pci.c28
-rw-r--r--include/hw/pci/pci.h2
-rw-r--r--include/hw/pci/pci_bus.h1
-rw-r--r--target/i386/translate.c5
6 files changed, 59 insertions, 3 deletions
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 35451c1e99..6d13ef877b 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -147,6 +147,11 @@ static uint16_t pcibus_numa_node(PCIBus *bus)
return NUMA_NODE_UNASSIGNED;
}
+static bool pcibus_allows_extended_config_space(PCIBus *bus)
+{
+ return false;
+}
+
static void pci_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
@@ -162,6 +167,7 @@ static void pci_bus_class_init(ObjectClass *klass, void *data)
pbc->is_root = pcibus_is_root;
pbc->bus_num = pcibus_num;
pbc->numa_node = pcibus_numa_node;
+ pbc->allows_extended_config_space = pcibus_allows_extended_config_space;
}
static const TypeInfo pci_bus_info = {
@@ -182,9 +188,22 @@ static const TypeInfo conventional_pci_interface_info = {
.parent = TYPE_INTERFACE,
};
+static bool pciebus_allows_extended_config_space(PCIBus *bus)
+{
+ return true;
+}
+
+static void pcie_bus_class_init(ObjectClass *klass, void *data)
+{
+ PCIBusClass *pbc = PCI_BUS_CLASS(klass);
+
+ pbc->allows_extended_config_space = pciebus_allows_extended_config_space;
+}
+
static const TypeInfo pcie_bus_info = {
.name = TYPE_PCIE_BUS,
.parent = TYPE_PCI_BUS,
+ .class_init = pcie_bus_class_init,
};
static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num);
@@ -401,6 +420,11 @@ bool pci_bus_is_root(PCIBus *bus)
return PCI_BUS_GET_CLASS(bus)->is_root(bus);
}
+bool pci_bus_allows_extended_config_space(PCIBus *bus)
+{
+ return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus);
+}
+
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index 5f5345dbac..9d64b2e12f 100644
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -54,7 +54,7 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit)
{
if (*limit > PCI_CONFIG_SPACE_SIZE) {
- if (!pci_bus_is_express(bus)) {
+ if (!pci_bus_allows_extended_config_space(bus)) {
*limit = PCI_CONFIG_SPACE_SIZE;
return;
}
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index b63ed9d8da..f0b6b23afc 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -1638,6 +1638,28 @@ static void spapr_phb_unrealize(DeviceState *dev, Error **errp)
memory_region_del_subregion(get_system_memory(), &sphb->mem32window);
}
+static bool spapr_phb_allows_extended_config_space(PCIBus *bus)
+{
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(BUS(bus)->parent);
+
+ return sphb->pcie_ecs;
+}
+
+static void spapr_phb_root_bus_class_init(ObjectClass *klass, void *data)
+{
+ PCIBusClass *pbc = PCI_BUS_CLASS(klass);
+
+ pbc->allows_extended_config_space = spapr_phb_allows_extended_config_space;
+}
+
+#define TYPE_SPAPR_PHB_ROOT_BUS "spapr-pci-host-bridge-root-bus"
+
+static const TypeInfo spapr_phb_root_bus_info = {
+ .name = TYPE_SPAPR_PHB_ROOT_BUS,
+ .parent = TYPE_PCI_BUS,
+ .class_init = spapr_phb_root_bus_class_init,
+};
+
static void spapr_phb_realize(DeviceState *dev, Error **errp)
{
/* We don't use SPAPR_MACHINE() in order to exit gracefully if the user
@@ -1739,10 +1761,11 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
&sphb->iowindow);
- bus = pci_register_root_bus(dev, NULL,
+ bus = pci_register_root_bus(dev, "pci.0",
pci_spapr_set_irq, pci_spapr_map_irq, sphb,
&sphb->memspace, &sphb->iospace,
- PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS);
+ PCI_DEVFN(0, 0), PCI_NUM_PINS,
+ TYPE_SPAPR_PHB_ROOT_BUS);
phb->bus = bus;
qbus_set_hotplug_handler(BUS(phb->bus), OBJECT(sphb), NULL);
@@ -2325,6 +2348,7 @@ void spapr_pci_rtas_init(void)
static void spapr_pci_register_types(void)
{
type_register_static(&spapr_phb_info);
+ type_register_static(&spapr_phb_root_bus_info);
}
type_init(spapr_pci_register_types)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index d87f5f93e9..0abb06b357 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -396,6 +396,8 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
bool pci_bus_is_express(PCIBus *bus);
bool pci_bus_is_root(PCIBus *bus);
+bool pci_bus_allows_extended_config_space(PCIBus *bus);
+
void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index dfb75752cb..f6df834170 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -18,6 +18,7 @@ typedef struct PCIBusClass {
bool (*is_root)(PCIBus *bus);
int (*bus_num)(PCIBus *bus);
uint16_t (*numa_node)(PCIBus *bus);
+ bool (*allows_extended_config_space)(PCIBus *bus);
} PCIBusClass;
struct PCIBus {
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 49cd298374..b725bec37c 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -1398,6 +1398,11 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d)
static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c)
{
if (s1->prefix & PREFIX_LOCK) {
+ if (d != OR_TMP0) {
+ /* Lock prefix when destination is not memory */
+ gen_illegal_opcode(s1);
+ return;
+ }
tcg_gen_movi_tl(s1->T0, c > 0 ? 1 : -1);
tcg_gen_atomic_add_fetch_tl(s1->T0, s1->A0, s1->T0,
s1->mem_index, ot | MO_LE);
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-30 15:59:47 +0000