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-rw-r--r--hw/sd/Kconfig6
-rw-r--r--hw/sd/Makefile.objs1
-rw-r--r--hw/sd/sdhci-internal.h34
-rw-r--r--hw/sd/sdhci-pci.c87
-rw-r--r--hw/sd/sdhci.c98
-rw-r--r--scripts/qemugdb/timers.py6
-rw-r--r--tests/ahci-test.c81
-rw-r--r--tests/libqos/libqos.c9
-rw-r--r--tests/libqos/libqos.h1
-rw-r--r--tests/test-announce-self.c21
10 files changed, 181 insertions, 163 deletions
diff --git a/hw/sd/Kconfig b/hw/sd/Kconfig
index 864f535011..c5e1e5581c 100644
--- a/hw/sd/Kconfig
+++ b/hw/sd/Kconfig
@@ -12,6 +12,10 @@ config SD
config SDHCI
bool
+ select SD
+
+config SDHCI_PCI
+ bool
default y if PCI_DEVICES
depends on PCI
- select SD
+ select SDHCI
diff --git a/hw/sd/Makefile.objs b/hw/sd/Makefile.objs
index a99d9fbb04..06657279d1 100644
--- a/hw/sd/Makefile.objs
+++ b/hw/sd/Makefile.objs
@@ -2,6 +2,7 @@ common-obj-$(CONFIG_PL181) += pl181.o
common-obj-$(CONFIG_SSI_SD) += ssi-sd.o
common-obj-$(CONFIG_SD) += sd.o core.o sdmmc-internal.o
common-obj-$(CONFIG_SDHCI) += sdhci.o
+common-obj-$(CONFIG_SDHCI_PCI) += sdhci-pci.o
obj-$(CONFIG_MILKYMIST) += milkymist-memcard.o
obj-$(CONFIG_OMAP) += omap_mmc.o
diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
index 19665fd401..34141400f8 100644
--- a/hw/sd/sdhci-internal.h
+++ b/hw/sd/sdhci-internal.h
@@ -304,4 +304,38 @@ extern const VMStateDescription sdhci_vmstate;
#define ESDHC_PRNSTS_SDSTB (1 << 3)
+/*
+ * Default SD/MMC host controller features information, which will be
+ * presented in CAPABILITIES register of generic SD host controller at reset.
+ *
+ * support:
+ * - 3.3v and 1.8v voltages
+ * - SDMA/ADMA1/ADMA2
+ * - high-speed
+ * max host controller R/W buffers size: 512B
+ * max clock frequency for SDclock: 52 MHz
+ * timeout clock frequency: 52 MHz
+ *
+ * does not support:
+ * - 3.0v voltage
+ * - 64-bit system bus
+ * - suspend/resume
+ */
+#define SDHC_CAPAB_REG_DEFAULT 0x057834b4
+
+#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
+ DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
+ DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
+ \
+ /* Capabilities registers provide information on supported
+ * features of this specific host controller implementation */ \
+ DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \
+ DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0)
+
+void sdhci_initfn(SDHCIState *s);
+void sdhci_uninitfn(SDHCIState *s);
+void sdhci_common_realize(SDHCIState *s, Error **errp);
+void sdhci_common_unrealize(SDHCIState *s, Error **errp);
+void sdhci_common_class_init(ObjectClass *klass, void *data);
+
#endif
diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c
new file mode 100644
index 0000000000..f884661862
--- /dev/null
+++ b/hw/sd/sdhci-pci.c
@@ -0,0 +1,87 @@
+/*
+ * SDHCI device on PCI
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/hw.h"
+#include "hw/sd/sdhci.h"
+#include "sdhci-internal.h"
+
+static Property sdhci_pci_properties[] = {
+ DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
+{
+ SDHCIState *s = PCI_SDHCI(dev);
+ Error *local_err = NULL;
+
+ sdhci_initfn(s);
+ sdhci_common_realize(s, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
+ dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */
+ dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */
+ s->irq = pci_allocate_irq(dev);
+ s->dma_as = pci_get_address_space(dev);
+ pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->iomem);
+}
+
+static void sdhci_pci_exit(PCIDevice *dev)
+{
+ SDHCIState *s = PCI_SDHCI(dev);
+
+ sdhci_common_unrealize(s, &error_abort);
+ sdhci_uninitfn(s);
+}
+
+static void sdhci_pci_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+
+ k->realize = sdhci_pci_realize;
+ k->exit = sdhci_pci_exit;
+ k->vendor_id = PCI_VENDOR_ID_REDHAT;
+ k->device_id = PCI_DEVICE_ID_REDHAT_SDHCI;
+ k->class_id = PCI_CLASS_SYSTEM_SDHCI;
+ dc->props = sdhci_pci_properties;
+
+ sdhci_common_class_init(klass, data);
+}
+
+static const TypeInfo sdhci_pci_info = {
+ .name = TYPE_PCI_SDHCI,
+ .parent = TYPE_PCI_DEVICE,
+ .instance_size = sizeof(SDHCIState),
+ .class_init = sdhci_pci_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+ { },
+ },
+};
+
+static void sdhci_pci_register_type(void)
+{
+ type_register_static(&sdhci_pci_info);
+}
+
+type_init(sdhci_pci_register_type)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 83f1574ffd..17ad5465a7 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -40,24 +40,6 @@
#define MASKED_WRITE(reg, mask, val) (reg = (reg & (mask)) | (val))
-/* Default SD/MMC host controller features information, which will be
- * presented in CAPABILITIES register of generic SD host controller at reset.
- *
- * support:
- * - 3.3v and 1.8v voltages
- * - SDMA/ADMA1/ADMA2
- * - high-speed
- * max host controller R/W buffers size: 512B
- * max clock frequency for SDclock: 52 MHz
- * timeout clock frequency: 52 MHz
- *
- * does not support:
- * - 3.0v voltage
- * - 64-bit system bus
- * - suspend/resume
- */
-#define SDHC_CAPAB_REG_DEFAULT 0x057834b4
-
static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
{
return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH));
@@ -1328,16 +1310,7 @@ static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
/* --- qdev common --- */
-#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
- DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
- DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \
- \
- /* Capabilities registers provide information on supported
- * features of this specific host controller implementation */ \
- DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \
- DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0)
-
-static void sdhci_initfn(SDHCIState *s)
+void sdhci_initfn(SDHCIState *s)
{
qbus_create_inplace(&s->sdbus, sizeof(s->sdbus),
TYPE_SDHCI_BUS, DEVICE(s), "sd-bus");
@@ -1348,7 +1321,7 @@ static void sdhci_initfn(SDHCIState *s)
s->io_ops = &sdhci_mmio_ops;
}
-static void sdhci_uninitfn(SDHCIState *s)
+void sdhci_uninitfn(SDHCIState *s)
{
timer_del(s->insert_timer);
timer_free(s->insert_timer);
@@ -1359,7 +1332,7 @@ static void sdhci_uninitfn(SDHCIState *s)
s->fifo_buffer = NULL;
}
-static void sdhci_common_realize(SDHCIState *s, Error **errp)
+void sdhci_common_realize(SDHCIState *s, Error **errp)
{
Error *local_err = NULL;
@@ -1375,7 +1348,7 @@ static void sdhci_common_realize(SDHCIState *s, Error **errp)
SDHC_REGISTERS_MAP_SIZE);
}
-static void sdhci_common_unrealize(SDHCIState *s, Error **errp)
+void sdhci_common_unrealize(SDHCIState *s, Error **errp)
{
/* This function is expected to be called only once for each class:
* - SysBus: via DeviceClass->unrealize(),
@@ -1445,7 +1418,7 @@ const VMStateDescription sdhci_vmstate = {
},
};
-static void sdhci_common_class_init(ObjectClass *klass, void *data)
+void sdhci_common_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1454,66 +1427,6 @@ static void sdhci_common_class_init(ObjectClass *klass, void *data)
dc->reset = sdhci_poweron_reset;
}
-/* --- qdev PCI --- */
-
-static Property sdhci_pci_properties[] = {
- DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState),
- DEFINE_PROP_END_OF_LIST(),
-};
-
-static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
-{
- SDHCIState *s = PCI_SDHCI(dev);
- Error *local_err = NULL;
-
- sdhci_initfn(s);
- sdhci_common_realize(s, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
- return;
- }
-
- dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */
- dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */
- s->irq = pci_allocate_irq(dev);
- s->dma_as = pci_get_address_space(dev);
- pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->iomem);
-}
-
-static void sdhci_pci_exit(PCIDevice *dev)
-{
- SDHCIState *s = PCI_SDHCI(dev);
-
- sdhci_common_unrealize(s, &error_abort);
- sdhci_uninitfn(s);
-}
-
-static void sdhci_pci_class_init(ObjectClass *klass, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
- PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
-
- k->realize = sdhci_pci_realize;
- k->exit = sdhci_pci_exit;
- k->vendor_id = PCI_VENDOR_ID_REDHAT;
- k->device_id = PCI_DEVICE_ID_REDHAT_SDHCI;
- k->class_id = PCI_CLASS_SYSTEM_SDHCI;
- dc->props = sdhci_pci_properties;
-
- sdhci_common_class_init(klass, data);
-}
-
-static const TypeInfo sdhci_pci_info = {
- .name = TYPE_PCI_SDHCI,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(SDHCIState),
- .class_init = sdhci_pci_class_init,
- .interfaces = (InterfaceInfo[]) {
- { INTERFACE_CONVENTIONAL_PCI_DEVICE },
- { },
- },
-};
-
/* --- qdev SysBus --- */
static Property sdhci_sysbus_properties[] = {
@@ -1846,7 +1759,6 @@ static const TypeInfo imx_usdhc_info = {
static void sdhci_register_types(void)
{
- type_register_static(&sdhci_pci_info);
type_register_static(&sdhci_sysbus_info);
type_register_static(&sdhci_bus_info);
type_register_static(&imx_usdhc_info);
diff --git a/scripts/qemugdb/timers.py b/scripts/qemugdb/timers.py
index 51ea04b5e2..f0e132d27a 100644
--- a/scripts/qemugdb/timers.py
+++ b/scripts/qemugdb/timers.py
@@ -6,8 +6,10 @@
#
# Author: Alex Bennée <alex.bennee@linaro.org>
#
-# This work is licensed under the terms of the GNU GPL, version 2. See
-# the COPYING file in the top-level directory.
+# This work is licensed under the terms of the GNU GPL, version 2 or later.
+# See the COPYING file in the top-level directory.
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
# 'qemu timers' -- display the current timerlists
diff --git a/tests/ahci-test.c b/tests/ahci-test.c
index 9f07e6f2ce..086811e602 100644
--- a/tests/ahci-test.c
+++ b/tests/ahci-test.c
@@ -38,7 +38,7 @@
#include "hw/pci/pci_regs.h"
/* TODO actually test the results and get rid of this */
-#define qmp_discard_response(...) qobject_unref(qmp(__VA_ARGS__))
+#define qmp_discard_response(s, ...) qobject_unref(qtest_qmp(s, __VA_ARGS__))
/* Test images sizes in MB */
#define TEST_IMAGE_SIZE_MB_LARGE (200 * 1024)
@@ -161,7 +161,6 @@ static AHCIQState *ahci_vboot(const char *cli, va_list ap)
s = g_new0(AHCIQState, 1);
s->parent = qtest_pc_vboot(cli, ap);
- global_qtest = s->parent->qts;
alloc_set_flags(&s->parent->alloc, ALLOC_LEAK_ASSERT);
/* Verify that we have an AHCI device present. */
@@ -201,7 +200,7 @@ static void ahci_shutdown(AHCIQState *ahci)
{
QOSState *qs = ahci->parent;
- set_context(qs);
+ assert(!global_qtest);
ahci_clean_mem(ahci);
free_ahci_device(ahci->dev);
g_free(ahci);
@@ -874,15 +873,15 @@ static void ahci_test_io_rw_simple(AHCIQState *ahci, unsigned bufsize,
/* Write some indicative pattern to our buffer. */
generate_pattern(tx, bufsize, AHCI_SECTOR_SIZE);
- bufwrite(ptr, tx, bufsize);
+ qtest_bufwrite(ahci->parent->qts, ptr, tx, bufsize);
/* Write this buffer to disk, then read it back to the DMA buffer. */
ahci_guest_io(ahci, port, write_cmd, ptr, bufsize, sector);
- qmemset(ptr, 0x00, bufsize);
+ qtest_memset(ahci->parent->qts, ptr, 0x00, bufsize);
ahci_guest_io(ahci, port, read_cmd, ptr, bufsize, sector);
/*** Read back the Data ***/
- bufread(ptr, rx, bufsize);
+ qtest_bufread(ahci->parent->qts, ptr, rx, bufsize);
g_assert_cmphex(memcmp(tx, rx, bufsize), ==, 0);
ahci_free(ahci, ptr);
@@ -923,7 +922,7 @@ static void ahci_test_max(AHCIQState *ahci)
}
port = ahci_test_nondata(ahci, cmd);
- memread(ahci->port[port].fb + 0x40, d2h, 0x20);
+ qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x40, d2h, 0x20);
nsect = (uint64_t)d2h->lba_hi[2] << 40 |
(uint64_t)d2h->lba_hi[1] << 32 |
(uint64_t)d2h->lba_hi[0] << 24 |
@@ -1041,7 +1040,7 @@ static void test_dma_fragmented(void)
/* Create a DMA buffer in guest memory, and write our pattern to it. */
ptr = guest_alloc(&ahci->parent->alloc, bufsize);
g_assert(ptr);
- bufwrite(ptr, tx, bufsize);
+ qtest_bufwrite(ahci->parent->qts, ptr, tx, bufsize);
cmd = ahci_command_create(CMD_WRITE_DMA);
ahci_command_adjust(cmd, 0, ptr, bufsize, 32);
@@ -1058,7 +1057,7 @@ static void test_dma_fragmented(void)
ahci_command_free(cmd);
/* Read back the guest's receive buffer into local memory */
- bufread(ptr, rx, bufsize);
+ qtest_bufread(ahci->parent->qts, ptr, rx, bufsize);
guest_free(&ahci->parent->alloc, ptr);
g_assert_cmphex(memcmp(tx, rx, bufsize), ==, 0);
@@ -1169,8 +1168,6 @@ static void ahci_migrate_simple(uint8_t cmd_read, uint8_t cmd_write)
"-drive if=ide,format=%s,file=%s "
"-incoming %s", imgfmt, tmp_path, uri);
- set_context(src->parent);
-
/* initialize */
px = ahci_port_select(src);
ahci_port_clear(src, px);
@@ -1238,7 +1235,7 @@ static void ahci_halted_io_test(uint8_t cmd_read, uint8_t cmd_write)
generate_pattern(tx, bufsize, AHCI_SECTOR_SIZE);
ptr = ahci_alloc(ahci, bufsize);
g_assert(ptr);
- memwrite(ptr, tx, bufsize);
+ qtest_memwrite(ahci->parent->qts, ptr, tx, bufsize);
/* Attempt to write (and fail) */
cmd = ahci_guest_io_halt(ahci, port, cmd_write,
@@ -1304,8 +1301,6 @@ static void ahci_migrate_halted_io(uint8_t cmd_read, uint8_t cmd_write)
"-incoming %s",
tmp_path, imgfmt, uri);
- set_context(src->parent);
-
/* Initialize and prepare */
port = ahci_port_select(src);
ahci_port_clear(src, port);
@@ -1314,7 +1309,7 @@ static void ahci_migrate_halted_io(uint8_t cmd_read, uint8_t cmd_write)
/* create DMA source buffer and write pattern */
ptr = ahci_alloc(src, bufsize);
g_assert(ptr);
- memwrite(ptr, tx, bufsize);
+ qtest_memwrite(src->parent->qts, ptr, tx, bufsize);
/* Write, trigger the VM to stop, migrate, then resume. */
cmd = ahci_guest_io_halt(src, port, cmd_write,
@@ -1372,8 +1367,6 @@ static void test_flush_migrate(void)
"-device ide-hd,drive=drive0 "
"-incoming %s", tmp_path, imgfmt, uri);
- set_context(src->parent);
-
px = ahci_port_select(src);
ahci_port_clear(src, px);
@@ -1384,14 +1377,14 @@ static void test_flush_migrate(void)
cmd = ahci_command_create(CMD_FLUSH_CACHE);
ahci_command_commit(src, cmd, px);
ahci_command_issue_async(src, cmd);
- qmp_eventwait("STOP");
+ qtest_qmp_eventwait(src->parent->qts, "STOP");
/* Migrate over */
ahci_migrate(src, dst, uri);
/* Complete the command */
- qmp_send("{'execute':'cont' }");
- qmp_eventwait("RESUME");
+ qtest_qmp_send(dst->parent->qts, "{'execute':'cont' }");
+ qtest_qmp_eventwait(dst->parent->qts, "RESUME");
ahci_command_wait(dst, cmd);
ahci_command_verify(dst, cmd);
@@ -1483,7 +1476,7 @@ static int ahci_cb_cmp_buff(AHCIQState *ahci, AHCICommand *cmd,
}
rx = g_malloc0(opts->size);
- bufread(opts->buffer, rx, opts->size);
+ qtest_bufread(ahci->parent->qts, opts->buffer, rx, opts->size);
g_assert_cmphex(memcmp(tx, rx, opts->size), ==, 0);
g_free(rx);
@@ -1558,9 +1551,10 @@ static void test_atapi_bcl(void)
}
-static void atapi_wait_tray(bool open)
+static void atapi_wait_tray(AHCIQState *ahci, bool open)
{
- QDict *rsp = qmp_eventwait_ref("DEVICE_TRAY_MOVED");
+ QDict *rsp = qtest_qmp_eventwait_ref(ahci->parent->qts,
+ "DEVICE_TRAY_MOVED");
QDict *data = qdict_get_qdict(rsp, "data");
if (open) {
g_assert(qdict_get_bool(data, "tray-open"));
@@ -1587,43 +1581,46 @@ static void test_atapi_tray(void)
port = ahci_port_select(ahci);
ahci_atapi_eject(ahci, port);
- atapi_wait_tray(true);
+ atapi_wait_tray(ahci, true);
ahci_atapi_load(ahci, port);
- atapi_wait_tray(false);
+ atapi_wait_tray(ahci, false);
/* Remove media */
- qmp_send("{'execute': 'blockdev-open-tray',"
- " 'arguments': {'id': 'cd0'}}");
- atapi_wait_tray(true);
- rsp = qmp_receive();
+ qtest_qmp_send(ahci->parent->qts, "{'execute': 'blockdev-open-tray', "
+ "'arguments': {'id': 'cd0'}}");
+ atapi_wait_tray(ahci, true);
+ rsp = qtest_qmp_receive(ahci->parent->qts);
qobject_unref(rsp);
- qmp_discard_response("{'execute': 'blockdev-remove-medium', "
+ qmp_discard_response(ahci->parent->qts,
+ "{'execute': 'blockdev-remove-medium', "
"'arguments': {'id': 'cd0'}}");
/* Test the tray without a medium */
ahci_atapi_load(ahci, port);
- atapi_wait_tray(false);
+ atapi_wait_tray(ahci, false);
ahci_atapi_eject(ahci, port);
- atapi_wait_tray(true);
+ atapi_wait_tray(ahci, true);
/* Re-insert media */
- qmp_discard_response("{'execute': 'blockdev-add', "
- "'arguments': {'node-name': 'node0', "
+ qmp_discard_response(ahci->parent->qts,
+ "{'execute': 'blockdev-add', "
+ "'arguments': {'node-name': 'node0', "
"'driver': 'raw', "
"'file': { 'driver': 'file', "
"'filename': %s }}}", iso);
- qmp_discard_response("{'execute': 'blockdev-insert-medium',"
- "'arguments': { 'id': 'cd0', "
+ qmp_discard_response(ahci->parent->qts,
+ "{'execute': 'blockdev-insert-medium',"
+ "'arguments': { 'id': 'cd0', "
"'node-name': 'node0' }}");
/* Again, the event shows up first */
- qmp_send("{'execute': 'blockdev-close-tray',"
- " 'arguments': {'id': 'cd0'}}");
- atapi_wait_tray(false);
- rsp = qmp_receive();
+ qtest_qmp_send(ahci->parent->qts, "{'execute': 'blockdev-close-tray', "
+ "'arguments': {'id': 'cd0'}}");
+ atapi_wait_tray(ahci, false);
+ rsp = qtest_qmp_receive(ahci->parent->qts);
qobject_unref(rsp);
/* Now, to convince ATAPI we understand the media has changed... */
@@ -1643,10 +1640,10 @@ static void test_atapi_tray(void)
/* Final tray test. */
ahci_atapi_eject(ahci, port);
- atapi_wait_tray(true);
+ atapi_wait_tray(ahci, true);
ahci_atapi_load(ahci, port);
- atapi_wait_tray(false);
+ atapi_wait_tray(ahci, false);
/* Cleanup */
g_free(tx);
diff --git a/tests/libqos/libqos.c b/tests/libqos/libqos.c
index 636a111a6f..d71557c5cb 100644
--- a/tests/libqos/libqos.c
+++ b/tests/libqos/libqos.c
@@ -73,11 +73,6 @@ void qtest_shutdown(QOSState *qs)
}
}
-void set_context(QOSState *s)
-{
- global_qtest = s->qts;
-}
-
static QDict *qmp_execute(QTestState *qts, const char *command)
{
return qtest_qmp(qts, "{ 'execute': %s }", command);
@@ -89,8 +84,6 @@ void migrate(QOSState *from, QOSState *to, const char *uri)
QDict *rsp, *sub;
bool running;
- set_context(from);
-
/* Is the machine currently running? */
rsp = qmp_execute(from->qts, "query-status");
g_assert(qdict_haskey(rsp, "return"));
@@ -114,7 +107,6 @@ void migrate(QOSState *from, QOSState *to, const char *uri)
/* If we were running, we can wait for an event. */
if (running) {
migrate_allocator(&from->alloc, &to->alloc);
- set_context(to);
qtest_qmp_eventwait(to->qts, "RESUME");
return;
}
@@ -144,7 +136,6 @@ void migrate(QOSState *from, QOSState *to, const char *uri)
}
migrate_allocator(&from->alloc, &to->alloc);
- set_context(to);
}
bool have_qemu_img(void)
diff --git a/tests/libqos/libqos.h b/tests/libqos/libqos.h
index 149b0be8bc..8e971c25a3 100644
--- a/tests/libqos/libqos.h
+++ b/tests/libqos/libqos.h
@@ -28,7 +28,6 @@ void qtest_shutdown(QOSState *qs);
bool have_qemu_img(void);
void mkimg(const char *file, const char *fmt, unsigned size_mb);
void mkqcow2(const char *file, unsigned size_mb);
-void set_context(QOSState *s);
void migrate(QOSState *from, QOSState *to, const char *uri);
void prepare_blkdebug_script(const char *debug_fn, const char *event);
void generate_pattern(void *buffer, size_t len, size_t cycle_len);
diff --git a/tests/test-announce-self.c b/tests/test-announce-self.c
index 1644d34a3f..0e6d466aa4 100644
--- a/tests/test-announce-self.c
+++ b/tests/test-announce-self.c
@@ -21,18 +21,8 @@
#define ETH_P_RARP 0x8035
#endif
-static QTestState *test_init(int socket)
-{
- char *args;
-
- args = g_strdup_printf("-netdev socket,fd=%d,id=hs0 -device "
- "virtio-net-pci,netdev=hs0", socket);
-
- return qtest_start(args);
-}
-
-static void test_announce(int socket)
+static void test_announce(QTestState *qs, int socket)
{
char buffer[60];
int len;
@@ -40,7 +30,7 @@ static void test_announce(int socket)
int ret;
uint16_t *proto = (uint16_t *)&buffer[12];
- rsp = qmp("{ 'execute' : 'announce-self', "
+ rsp = qtest_qmp(qs, "{ 'execute' : 'announce-self', "
" 'arguments': {"
" 'initial': 50, 'max': 550,"
" 'rounds': 10, 'step': 50 } }");
@@ -59,14 +49,15 @@ static void test_announce(int socket)
static void setup(gconstpointer data)
{
QTestState *qs;
- void (*func) (int socket) = data;
+ void (*func) (QTestState *qs, int socket) = data;
int sv[2], ret;
ret = socketpair(PF_UNIX, SOCK_STREAM, 0, sv);
g_assert_cmpint(ret, !=, -1);
- qs = test_init(sv[1]);
- func(sv[0]);
+ qs = qtest_initf("-netdev socket,fd=%d,id=hs0 -device "
+ "virtio-net-pci,netdev=hs0", sv[1]);
+ func(qs, sv[0]);
/* End test */
close(sv[0]);
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-13 11:30:12 +0000