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-rw-r--r--linux-user/aarch64/cpu_loop.c8
-rw-r--r--linux-user/aarch64/signal.c3
-rw-r--r--target/arm/helper.c6
-rw-r--r--target/arm/sme_helper.c8
4 files changed, 6 insertions, 19 deletions
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 5e93d27d8f..2e2f7cf218 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -89,14 +89,8 @@ void cpu_loop(CPUARMState *env)
switch (trapnr) {
case EXCP_SWI:
- /*
- * On syscall, PSTATE.ZA is preserved, along with the ZA matrix.
- * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState.
- */
+ /* On syscall, PSTATE.ZA is preserved, PSTATE.SM is cleared. */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
- if (FIELD_EX64(env->svcr, SVCR, SM)) {
- arm_rebuild_hflags(env);
- }
ret = do_syscall(env,
env->xregs[8],
env->xregs[0],
diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c
index a326a6def5..b265cfd470 100644
--- a/linux-user/aarch64/signal.c
+++ b/linux-user/aarch64/signal.c
@@ -667,9 +667,6 @@ static void target_setup_frame(int usig, struct target_sigaction *ka,
/* Invoke the signal handler with both SM and ZA disabled. */
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK);
- if (env->svcr) {
- arm_rebuild_hflags(env);
- }
if (info) {
tswap_siginfo(&frame->info, info);
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 564c5d9332..8077967849 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6738,6 +6738,9 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
{
uint64_t change = (env->svcr ^ new) & mask;
+ if (change == 0) {
+ return;
+ }
env->svcr ^= change;
if (change & R_SVCR_SM_MASK) {
@@ -6755,6 +6758,8 @@ void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
if (change & new & R_SVCR_ZA_MASK) {
memset(env->zarray, 0, sizeof(env->zarray));
}
+
+ arm_rebuild_hflags(env);
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
@@ -6763,7 +6768,6 @@ static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM));
helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA));
aarch64_set_svcr(env, value, -1);
- arm_rebuild_hflags(env);
}
static void smcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c
index e146c17ba1..3abe03e4cb 100644
--- a/target/arm/sme_helper.c
+++ b/target/arm/sme_helper.c
@@ -31,20 +31,12 @@
void helper_set_pstate_sm(CPUARMState *env, uint32_t i)
{
- if (i == FIELD_EX64(env->svcr, SVCR, SM)) {
- return;
- }
aarch64_set_svcr(env, 0, R_SVCR_SM_MASK);
- arm_rebuild_hflags(env);
}
void helper_set_pstate_za(CPUARMState *env, uint32_t i)
{
- if (i == FIELD_EX64(env->svcr, SVCR, ZA)) {
- return;
- }
aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK);
- arm_rebuild_hflags(env);
}
void helper_sme_zero(CPUARMState *env, uint32_t imm, uint32_t svl)