diff options
| -rw-r--r-- | Makefile.target | 2 | ||||
| -rw-r--r-- | hw/acpi.c | 185 | ||||
| -rw-r--r-- | hw/pc.c | 6 | ||||
| -rw-r--r-- | hw/smbus.h | 38 | ||||
| -rw-r--r-- | hw/smbus_eeprom.c | 94 | ||||
| -rw-r--r-- | vl.h | 6 |
6 files changed, 330 insertions, 1 deletions
diff --git a/Makefile.target b/Makefile.target index b840cc7822..dc9a965753 100644 --- a/Makefile.target +++ b/Makefile.target @@ -370,7 +370,7 @@ ifeq ($(TARGET_BASE_ARCH), i386) VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o acpi.o piix_pci.o -VL_OBJS+= usb-uhci.o +VL_OBJS+= usb-uhci.o smbus_eeprom.o CPPFLAGS += -DHAS_AUDIO endif ifeq ($(TARGET_BASE_ARCH), ppc) @@ -24,6 +24,7 @@ #define PM_FREQ 3579545 #define ACPI_DBG_IO_ADDR 0xb044 +#define SMB_IO_BASE 0xb100 typedef struct PIIX4PMState { PCIDevice dev; @@ -34,6 +35,15 @@ typedef struct PIIX4PMState { uint8_t apms; QEMUTimer *tmr_timer; int64_t tmr_overflow_time; + SMBusDevice *smb_dev[128]; + uint8_t smb_stat; + uint8_t smb_ctl; + uint8_t smb_cmd; + uint8_t smb_addr; + uint8_t smb_data0; + uint8_t smb_data1; + uint8_t smb_data[32]; + uint8_t smb_index; } PIIX4PMState; #define RTC_EN (1 << 10) @@ -45,6 +55,17 @@ typedef struct PIIX4PMState { #define SUS_EN (1 << 13) +#define SMBHSTSTS 0x00 +#define SMBHSTCNT 0x02 +#define SMBHSTCMD 0x03 +#define SMBHSTADD 0x04 +#define SMBHSTDAT0 0x05 +#define SMBHSTDAT1 0x06 +#define SMBBLKDAT 0x07 + +/* Note: only used for piix4_smbus_register_device */ +static PIIX4PMState *piix4_pm_state; + static uint32_t get_pmtmr(PIIX4PMState *s) { uint32_t d; @@ -231,6 +252,156 @@ static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val) #endif } +static void smb_transaction(PIIX4PMState *s) +{ + uint8_t prot = (s->smb_ctl >> 2) & 0x07; + uint8_t read = s->smb_addr & 0x01; + uint8_t cmd = s->smb_cmd; + uint8_t addr = s->smb_addr >> 1; + SMBusDevice *dev = s->smb_dev[addr]; + +#ifdef DEBUG + printf("SMBus trans addr=0x%02x prot=0x%02x\n", addr, prot); +#endif + if (!dev) goto error; + + switch(prot) { + case 0x0: + if (!dev->quick_cmd) goto error; + (*dev->quick_cmd)(dev, read); + break; + case 0x1: + if (read) { + if (!dev->receive_byte) goto error; + s->smb_data0 = (*dev->receive_byte)(dev); + } + else { + if (!dev->send_byte) goto error; + (*dev->send_byte)(dev, cmd); + } + break; + case 0x2: + if (read) { + if (!dev->read_byte) goto error; + s->smb_data0 = (*dev->read_byte)(dev, cmd); + } + else { + if (!dev->write_byte) goto error; + (*dev->write_byte)(dev, cmd, s->smb_data0); + } + break; + case 0x3: + if (read) { + uint16_t val; + if (!dev->read_word) goto error; + val = (*dev->read_word)(dev, cmd); + s->smb_data0 = val; + s->smb_data1 = val >> 8; + } + else { + if (!dev->write_word) goto error; + (*dev->write_word)(dev, cmd, (s->smb_data1 << 8) | s->smb_data0); + } + break; + case 0x5: + if (read) { + if (!dev->read_block) goto error; + s->smb_data0 = (*dev->read_block)(dev, cmd, s->smb_data); + } + else { + if (!dev->write_block) goto error; + (*dev->write_block)(dev, cmd, s->smb_data0, s->smb_data); + } + break; + default: + goto error; + } + return; + + error: + s->smb_stat |= 0x04; +} + +static void smb_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) +{ + PIIX4PMState *s = opaque; + addr &= 0x3f; +#ifdef DEBUG + printf("SMB writeb port=0x%04x val=0x%02x\n", addr, val); +#endif + switch(addr) { + case SMBHSTSTS: + s->smb_stat = 0; + s->smb_index = 0; + break; + case SMBHSTCNT: + s->smb_ctl = val; + if (val & 0x40) + smb_transaction(s); + break; + case SMBHSTCMD: + s->smb_cmd = val; + break; + case SMBHSTADD: + s->smb_addr = val; + break; + case SMBHSTDAT0: + s->smb_data0 = val; + break; + case SMBHSTDAT1: + s->smb_data1 = val; + break; + case SMBBLKDAT: + s->smb_data[s->smb_index++] = val; + if (s->smb_index > 31) + s->smb_index = 0; + break; + default: + break; + } +} + +static uint32_t smb_ioport_readb(void *opaque, uint32_t addr) +{ + PIIX4PMState *s = opaque; + uint32_t val; + + addr &= 0x3f; + switch(addr) { + case SMBHSTSTS: + val = s->smb_stat; + break; + case SMBHSTCNT: + s->smb_index = 0; + val = s->smb_ctl & 0x1f; + break; + case SMBHSTCMD: + val = s->smb_cmd; + break; + case SMBHSTADD: + val = s->smb_addr; + break; + case SMBHSTDAT0: + val = s->smb_data0; + break; + case SMBHSTDAT1: + val = s->smb_data1; + break; + case SMBBLKDAT: + val = s->smb_data[s->smb_index++]; + if (s->smb_index > 31) + s->smb_index = 0; + break; + default: + val = 0; + break; + } +#ifdef DEBUG + printf("SMB readb port=0x%04x val=0x%02x\n", addr, val); +#endif + return val; +} + static void pm_io_space_update(PIIX4PMState *s) { uint32_t pm_io_base; @@ -302,6 +473,7 @@ void piix4_pm_init(PCIBus *bus, int devfn) { PIIX4PMState *s; uint8_t *pci_conf; + uint32_t pm_io_base, smb_io_base; s = (PIIX4PMState *)pci_register_device(bus, "PM", sizeof(PIIX4PMState), @@ -332,7 +504,20 @@ void piix4_pm_init(PCIBus *bus, int devfn) pci_conf[0x67] = (serial_hds[0] != NULL ? 0x08 : 0) | (serial_hds[1] != NULL ? 0x90 : 0); + smb_io_base = SMB_IO_BASE; + pci_conf[0x90] = smb_io_base | 1; + pci_conf[0x91] = smb_io_base >> 8; + pci_conf[0xd2] = 0x09; + register_ioport_write(smb_io_base, 64, 1, smb_ioport_writeb, s); + register_ioport_read(smb_io_base, 64, 1, smb_ioport_readb, s); + s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s); register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s); + piix4_pm_state = s; +} + +void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr) +{ + piix4_pm_state->smb_dev[addr] = dev; } @@ -699,7 +699,13 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device, } if (pci_enabled && acpi_enabled) { + uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ piix4_pm_init(pci_bus, piix3_devfn + 3); + for (i = 0; i < 8; i++) { + SMBusDevice *eeprom = smbus_eeprom_device_init(0x50 + i, + eeprom_buf + (i * 256)); + piix4_smbus_register_device(eeprom, 0x50 + i); + } } if (i440fx_state) { diff --git a/hw/smbus.h b/hw/smbus.h new file mode 100644 index 0000000000..76fc3c8395 --- /dev/null +++ b/hw/smbus.h @@ -0,0 +1,38 @@ +/* + * QEMU SMBus API + * + * Copyright (c) 2007 Arastra, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +typedef struct SMBusDevice SMBusDevice; + +struct SMBusDevice { + uint8_t addr; + void (*quick_cmd)(SMBusDevice *dev, uint8_t read); + void (*send_byte)(SMBusDevice *dev, uint8_t val); + uint8_t (*receive_byte)(SMBusDevice *dev); + void (*write_byte)(SMBusDevice *dev, uint8_t cmd, uint8_t val); + uint8_t (*read_byte)(SMBusDevice *dev, uint8_t cmd); + void (*write_word)(SMBusDevice *dev, uint8_t cmd, uint16_t val); + uint16_t (*read_word)(SMBusDevice *dev, uint8_t cmd); + void (*write_block)(SMBusDevice *dev, uint8_t cmd, uint8_t len, uint8_t *buf); + uint8_t (*read_block)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf); +}; diff --git a/hw/smbus_eeprom.c b/hw/smbus_eeprom.c new file mode 100644 index 0000000000..d401b17565 --- /dev/null +++ b/hw/smbus_eeprom.c @@ -0,0 +1,94 @@ +/* + * QEMU SMBus EEPROM device + * + * Copyright (c) 2007 Arastra, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "vl.h" + +//#define DEBUG + +typedef struct SMBusEEPROMDevice { + SMBusDevice dev; + uint8_t *data; + uint8_t offset; +} SMBusEEPROMDevice; + +static void eeprom_quick_cmd(SMBusDevice *dev, uint8_t read) +{ +#ifdef DEBUG + printf("eeprom_quick_cmd: addr=0x%02x read=%d\n", dev->addr, read); +#endif +} + +static void eeprom_send_byte(SMBusDevice *dev, uint8_t val) +{ + SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev; +#ifdef DEBUG + printf("eeprom_send_byte: addr=0x%02x val=0x%02x\n", dev->addr, val); +#endif + eeprom->offset = val; +} + +static uint8_t eeprom_receive_byte(SMBusDevice *dev) +{ + SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev; + uint8_t val = eeprom->data[eeprom->offset++]; +#ifdef DEBUG + printf("eeprom_receive_byte: addr=0x%02x val=0x%02x\n", dev->addr, val); +#endif + return val; +} + +static void eeprom_write_byte(SMBusDevice *dev, uint8_t cmd, uint8_t val) +{ + SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev; +#ifdef DEBUG + printf("eeprom_write_byte: addr=0x%02x cmd=0x%02x val=0x%02x\n", dev->addr, + cmd, val); +#endif + eeprom->data[cmd] = val; +} + +static uint8_t eeprom_read_byte(SMBusDevice *dev, uint8_t cmd) +{ + SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *) dev; + uint8_t val = eeprom->data[cmd]; +#ifdef DEBUG + printf("eeprom_read_byte: addr=0x%02x cmd=0x%02x val=0x%02x\n", dev->addr, + cmd, val); +#endif + return val; +} + +SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf) +{ + SMBusEEPROMDevice *eeprom = qemu_mallocz(sizeof(SMBusEEPROMDevice)); + eeprom->dev.addr = addr; + eeprom->dev.quick_cmd = eeprom_quick_cmd; + eeprom->dev.send_byte = eeprom_send_byte; + eeprom->dev.receive_byte = eeprom_receive_byte; + eeprom->dev.write_byte = eeprom_write_byte; + eeprom->dev.read_byte = eeprom_read_byte; + eeprom->data = buf; + eeprom->offset = 0; + return (SMBusDevice *) eeprom; +} @@ -1048,11 +1048,17 @@ int pit_get_out(PITState *pit, int channel, int64_t current_time); void pcspk_init(PITState *); int pcspk_audio_init(AudioState *); +#include "hw/smbus.h" + /* acpi.c */ extern int acpi_enabled; void piix4_pm_init(PCIBus *bus, int devfn); +void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); void acpi_bios_init(void); +/* smbus_eeprom.c */ +SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf); + /* pc.c */ extern QEMUMachine pc_machine; extern QEMUMachine isapc_machine; |