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-rw-r--r--target-m68k/op.c7
-rw-r--r--target-m68k/translate.c4
2 files changed, 7 insertions, 4 deletions
diff --git a/target-m68k/op.c b/target-m68k/op.c
index 489eafeef6..8ea7589c3f 100644
--- a/target-m68k/op.c
+++ b/target-m68k/op.c
@@ -412,7 +412,10 @@ OP(divu)
quot = num / den;
rem = num % den;
flags = 0;
- if (PARAM1 && quot > 0xffff)
+ /* Avoid using a PARAM1 of zero. This breaks dyngen because it uses
+ the address of a symbol, and gcc knows symbols can't have address
+ zero. */
+ if (PARAM1 == 2 && quot > 0xffff)
flags |= CCF_V;
if (quot == 0)
flags |= CCF_Z;
@@ -439,7 +442,7 @@ OP(divs)
quot = num / den;
rem = num % den;
flags = 0;
- if (PARAM1 && quot != (int16_t)quot)
+ if (PARAM1 == 2 && quot != (int16_t)quot)
flags |= CCF_V;
if (quot == 0)
flags |= CCF_Z;
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 10728f97d3..9c34c626b2 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -747,9 +747,9 @@ DISAS_INSN(divl)
den = gen_ea(s, insn, OS_LONG, 0, NULL);
gen_op_mov32(QREG_DIV2, den);
if (ext & 0x0800) {
- gen_op_divs(0);
+ gen_op_divs(2);
} else {
- gen_op_divu(0);
+ gen_op_divu(2);
}
if (num == reg) {
/* div */