diff options
| -rw-r--r-- | qemu-tech.texi | 25 | ||||
| -rw-r--r-- | target-cris/cpu.h | 7 | ||||
| -rw-r--r-- | target-i386/cpu.h | 7 | ||||
| -rw-r--r-- | target-m68k/cpu.h | 8 | ||||
| -rw-r--r-- | target-s390x/cpu.h | 7 | ||||
| -rw-r--r-- | target-sparc/cpu.h | 5 |
6 files changed, 34 insertions, 25 deletions
diff --git a/qemu-tech.texi b/qemu-tech.texi index 082b62c8e0..75ceea408c 100644 --- a/qemu-tech.texi +++ b/qemu-tech.texi @@ -214,7 +214,6 @@ SH4 @menu * QEMU compared to other emulators:: * Portable dynamic translation:: -* Condition code optimisations:: * CPU state optimisations:: * Translation cache:: * Direct block chaining:: @@ -290,30 +289,6 @@ performances. QEMU's dynamic translation backend is called TCG, for "Tiny Code Generator". For more information, please take a look at @code{tcg/README}. -@node Condition code optimisations -@section Condition code optimisations - -Lazy evaluation of CPU condition codes (@code{EFLAGS} register on x86) -is important for CPUs where every instruction sets the condition -codes. It tends to be less important on conventional RISC systems -where condition codes are only updated when explicitly requested. On -Sparc64, costly update of both 32 and 64 bit condition codes can be -avoided with lazy evaluation. - -Instead of computing the condition codes after each x86 instruction, -QEMU just stores one operand (called @code{CC_SRC}), the result -(called @code{CC_DST}) and the type of operation (called -@code{CC_OP}). When the condition codes are needed, the condition -codes can be calculated using this information. In addition, an -optimized calculation can be performed for some instruction types like -conditional branches. - -@code{CC_OP} is almost never explicitly set in the generated code -because it is known at translation time. - -The lazy condition code evaluation is used on x86, m68k, cris and -Sparc. ARM uses a simplified variant for the N and Z flags. - @node CPU state optimisations @section CPU state optimisations diff --git a/target-cris/cpu.h b/target-cris/cpu.h index 7d7fe6eb1c..43d5f9d1da 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -223,6 +223,13 @@ int cpu_cris_signal_handler(int host_signum, void *pinfo, void cris_initialize_tcg(void); void cris_initialize_crisv10_tcg(void); +/* Instead of computing the condition codes after each CRIS instruction, + * QEMU just stores one operand (called CC_SRC), the result + * (called CC_DEST) and the type of operation (called CC_OP). When the + * condition codes are needed, the condition codes can be calculated + * using this information. Condition codes are not generated if they + * are only needed for conditional branches. + */ enum { CC_OP_DYNAMIC, /* Use env->cc_op */ CC_OP_FLAGS, diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 1cb32ae456..e64569854f 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -698,6 +698,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; /* Use a clearer name for this. */ #define CPU_INTERRUPT_INIT CPU_INTERRUPT_RESET +/* Instead of computing the condition codes after each x86 instruction, + * QEMU just stores one operand (called CC_SRC), the result + * (called CC_DST) and the type of operation (called CC_OP). When the + * condition codes are needed, the condition codes can be calculated + * using this information. Condition codes are not generated if they + * are only needed for conditional branches. + */ typedef enum { CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC = flags */ diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index c2d40cb1cc..471f490dc1 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -154,6 +154,14 @@ int cpu_m68k_signal_handler(int host_signum, void *pinfo, void *puc); void cpu_m68k_flush_flags(CPUM68KState *, int); + +/* Instead of computing the condition codes after each m68k instruction, + * QEMU just stores one operand (called CC_SRC), the result + * (called CC_DEST) and the type of operation (called CC_OP). When the + * condition codes are needed, the condition codes can be calculated + * using this information. Condition codes are not generated if they + * are only needed for conditional branches. + */ enum { CC_OP_DYNAMIC, /* Use env->cc_op */ CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */ diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 4fb34b598d..4e58cdee3e 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -671,6 +671,13 @@ ObjectClass *s390_cpu_class_by_name(const char *name); /* CC optimization */ +/* Instead of computing the condition codes after each x86 instruction, + * QEMU just stores the result (called CC_DST), the type of operation + * (called CC_OP) and whatever operands are needed (CC_SRC and possibly + * CC_VR). When the condition codes are needed, the condition codes can + * be calculated using this information. Condition codes are not generated + * if they are only needed for conditional branches. + */ enum cc_op { CC_OP_CONST0 = 0, /* CC is 0 */ CC_OP_CONST1, /* CC is 1 */ diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index a3d64a4e52..646a103513 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -102,6 +102,11 @@ #define CC_DST (env->cc_dst) #define CC_OP (env->cc_op) +/* Even though lazy evaluation of CPU condition codes tends to be less + * important on RISC systems where condition codes are only updated + * when explicitly requested, SPARC uses it to update 32-bit and 64-bit + * condition codes. + */ enum { CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_FLAGS, /* all cc are back in status register */ |