diff options
| -rw-r--r-- | gdbstub.c | 21 | ||||
| -rw-r--r-- | include/qom/cpu.h | 3 | ||||
| -rw-r--r-- | target-sparc/cpu.c | 3 | ||||
| -rw-r--r-- | target-sparc/cpu.h | 5 | ||||
| -rw-r--r-- | target-sparc/mmu_helper.c | 8 |
5 files changed, 25 insertions, 15 deletions
@@ -42,15 +42,16 @@ #include "sysemu/kvm.h" #include "qemu/bitops.h" -#ifndef TARGET_CPU_MEMORY_RW_DEBUG -static inline int target_memory_rw_debug(CPUArchState *env, target_ulong addr, - uint8_t *buf, int len, int is_write) +static inline int target_memory_rw_debug(CPUState *cpu, target_ulong addr, + uint8_t *buf, int len, bool is_write) { - return cpu_memory_rw_debug(ENV_GET_CPU(env), addr, buf, len, is_write); + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->memory_rw_debug) { + return cc->memory_rw_debug(cpu, addr, buf, len, is_write); + } + return cpu_memory_rw_debug(cpu, addr, buf, len, is_write); } -#else -/* target_memory_rw_debug() defined in cpu.h */ -#endif enum { GDB_SIGNAL_0 = 0, @@ -2248,7 +2249,8 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf) if (*p == ',') p++; len = strtoull(p, NULL, 16); - if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) { + if (target_memory_rw_debug(ENV_GET_CPU(s->g_cpu), addr, mem_buf, len, + false) != 0) { put_packet (s, "E14"); } else { memtohex(buf, mem_buf, len); @@ -2263,7 +2265,8 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf) if (*p == ':') p++; hextomem(mem_buf, p, len); - if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0) { + if (target_memory_rw_debug(ENV_GET_CPU(s->g_cpu), addr, mem_buf, len, + true) != 0) { put_packet(s, "E14"); } else { put_packet(s, "OK"); diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 63666464de..f71ec2d041 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -70,6 +70,7 @@ struct TranslationBlock; * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @do_interrupt: Callback for interrupt handling. * @do_unassigned_access: Callback for unassigned access handling. + * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. @@ -94,6 +95,8 @@ typedef struct CPUClass { int reset_dump_flags; void (*do_interrupt)(CPUState *cpu); CPUUnassignedAccess do_unassigned_access; + int (*memory_rw_debug)(CPUState *cpu, vaddr addr, + uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); void (*dump_statistics)(CPUState *cpu, FILE *f, diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 12494ccaa4..d1d03396ef 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -782,6 +782,9 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = sparc_cpu_do_interrupt; cc->dump_state = sparc_cpu_dump_state; +#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) + cc->memory_rw_debug = sparc_cpu_memory_rw_debug; +#endif cc->set_pc = sparc_cpu_set_pc; cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb; #ifndef CONFIG_USER_ONLY diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 0f35a2216f..41194ec06b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -526,9 +526,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev); void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env); #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) -int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr, - uint8_t *buf, int len, int is_write); -#define TARGET_CPU_MEMORY_RW_DEBUG +int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr, + uint8_t *buf, int len, bool is_write); #endif diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index 45d08e47a5..ef12a0a8d0 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -353,10 +353,12 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) * reads (and only reads) in stack frames as if windows were flushed. We assume * that the sparc ABI is followed. */ -int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr, - uint8_t *buf, int len, int is_write) +int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address, + uint8_t *buf, int len, bool is_write) { - CPUState *cs = CPU(sparc_env_get_cpu(env)); + SPARCCPU *cpu = SPARC_CPU(cs); + CPUSPARCState *env = &cpu->env; + target_ulong addr = address; int i; int len1; int cwp = env->cwp; |