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author | Richard Henderson <richard.henderson@linaro.org> | 2023-05-06 08:11:52 +0100 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-06 08:11:52 +0100 |
commit | 792f77f376adef944f9a03e601f6ad90c2f891b2 (patch) | |
tree | 359a7b1beb34dc779c99505868889bcc4ebcfc54 /util/rcu.c | |
parent | 47d3878422ed0216cb1d5d69c3b929f10a008cd4 (diff) | |
parent | 725d7e763a802321e1bb303348afc551d564d31e (diff) |
Merge tag 'pull-loongarch-20230506' of https://gitlab.com/gaosong/qemu into staging
Add LoongArch LSX instructions.
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* tag 'pull-loongarch-20230506' of https://gitlab.com/gaosong/qemu: (45 commits)
hw/intc: don't use target_ulong for LoongArch ipi
target/loongarch: CPUCFG support LSX
target/loongarch: Use {set/get}_gpr replace to cpu_fpr
target/loongarch: Implement vldi
target/loongarch: Implement vld vst
target/loongarch: Implement vilvl vilvh vextrins vshuf
target/loongarch: Implement vreplve vpack vpick
target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vr
target/loongarch: Implement vbitsel vset
target/loongarch: Implement vfcmp
target/loongarch: Implement vseq vsle vslt
target/loongarch: Implement LSX fpu fcvt instructions
target/loongarch: Implement LSX fpu arith instructions
target/loongarch: Implement vfrstp
target/loongarch: Implement vbitclr vbitset vbitrev
target/loongarch: Implement vpcnt
target/loongarch: Implement vclo vclz
target/loongarch: Implement vssrlrn vssrarn
target/loongarch: Implement vssrln vssran
target/loongarch: Implement vsrlrn vsrarn
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'util/rcu.c')
0 files changed, 0 insertions, 0 deletions