diff options
author | Suraj Jitindar Singh <sjitindarsingh@gmail.com> | 2017-03-01 18:12:57 +1100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2017-03-03 11:30:59 +1100 |
commit | 9b44c836dc37507513eb67cea862f82dafa249d8 (patch) | |
tree | f942c4afb8b3c1cc227a12e3544c5e60060c1415 /util/mmap-alloc.c | |
parent | ecb24d334af1a98ef0329f4b3b0e14ae8cb8770d (diff) |
target/ppc: Add POWER9/ISAv3.00 to compat_table
compat_table contains the list of logical pvr compat modes which a cpu can
operate in. It is a list of struct CompatInfo which contains the given pvr
value for a compat mode, the pcr bits which should be set to operate in
that compat mode, the pcr level which must be present in pcr_supported for
a processor to support that compat mode and the max threads possible in
that compat mode.
Add an entry for the POWER9/ISAv3.00 logical pvr which represents a
processor running with support for logical pvr 0x0f000005. A processor
running in this mode should have PCR_COMPAT_3_00 set in the pcr (if
available in pcr_mask) and should have PCR_COMPAT_3_00 in pcr_supported
to indicate that it is capable of running in this compat mode.
Also add PCR_COMPAT_3_00 to the bits which must be set for all previous
compat modes. Since no processor models contain this bit yet in pcr_mask
it will never be set, but this ensures we don't forget to in the future.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'util/mmap-alloc.c')
0 files changed, 0 insertions, 0 deletions